Method for patching virtually aliased pages by a virtual-machine monitor

• US 20060026385A1
• Filed: 07/31/2004
• Published: 02/02/2006
• Est. Priority Date: 07/31/2004
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Ross, Jonathan, Kjos, Todd, Dinechin, Christophe de
• Granted Patent: US 7,213,125 B2
• Time in Patent Office: Days
• US Class Current: 711/210
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/1036 for multiple virtual address spaces, e.g. segmentation G06F12/1045 takes precedence
• CPC Class Codes: G06F 12/1425 the protection being physical, e.g. cell, word, block
• CPC Class Codes: G06F 2009/45583 Memory management, e.g. access or allocation
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects

Abstract

Various embodiments of the present invention are directed to methods by which a virtual-machine monitor can introduce branch instructions, in order to emulate privileged and other instructions on behalf of a guest operating system, into guest-operating-system code residing on virtually aliased virtual-memory pages. In a described embodiment of the present invention, the virtual-machine monitor physically aliases each virtual alias for a particular physical memory page by allocating a physical page for the virtual alias, copying the original contents of the physical memory page to the allocated physical page, or physical alias page, and subsequently patching each physical alias page appropriate to the physical address of the physical alias page.

Claims

1. A method for patching and aliasing a virtual-memory page by a virtual-machine monitor, the method comprising:

when the virtual-memory page is aliased and needs to be patched, physically aliasing each alias of the virtual-memory page and separately patching each physical alias;

when the virtual-memory page is patched and needs to be aliased, aliasing the virtual-memory page by creating a virtual-address alias, physically aliasing the created alias of the virtual-memory page, and separately patching each physical alias; and

detecting access to patched, aliased pages and resolving the access.

2. The method of claim 1 wherein physically aliasing a virtual-address alias further includes:

allocating a new physical memory page corresponding to the virtual-address alias;

modifying a virtual-address translation for the virtual-address alias to reference the allocated physical-memory page; and

copying contents of a physical memory page associated with an original virtual-memory address equivalent to the virtual-address alias to the allocated physical memory page.

3. The method of claim 2 wherein physically aliasing a virtual-address alias further includes storing an association between the allocated physical page and the physical memory page.

4. The method of claim 1 wherein aliasing a virtual-memory page by creating a virtual-address alias further includes:

allocating a new virtual-memory address;

allocating a translation for the new virtual-memory alias;

storing a reference to a physical-memory page corresponding to the virtual-memory page in the newly created translation; and

storing an association between the new virtual-memory address and an original virtual-address for the virtual-memory page.

5. The method of claim 1 wherein resolving access to an aliased virtual-memory page further includes:

when the access is a read operation directed to the aliased virtual-memory page, directing the read operation to a page containing unpatched, original contents of the original virtual-memory page.

6. The method of claim 1 wherein resolving access to an aliased virtual-memory page further includes:

when the access is a write operation directed to the aliased virtual-memory page, directing the read operation to a page containing unpatched, original contents of the original virtual-memory page and updating virtual-address translations for all of the virtual-address aliases of the virtual-memory page to the page containing unpatched, original contents of the original virtual-memory page.

7. Computer-readable instructions encoded in a computer-readable medium that implement the method of claim 1.

8. A virtual-machine monitor that includes instructions that implement the method of claim 1.