Method and apparatus for fast acquisition and low SNR tracking in satellite positioning system receivers

• US 20060056497A1
• Filed: 04/05/2005
• Published: 03/16/2006
• Est. Priority Date: 02/24/2000
• Status: Active Grant

• Current Assignee: Gary R. Lennen
• Original Assignee: Gary R. Lennen
• Inventors: Lennen, Gary R.
• Granted Patent: US 7,110,442 B2
• Time in Patent Office: Days
• US Class Current: 375/150
• CPC Class Codes: G01S 19/24 Acquisition or tracking or demodulation of signals transmitted by the system synchronisation aspects of direct sequence spread spectrum modulation H04B1/7073
• CPC Class Codes: G01S 19/246 involving long acquisition integration times, extended snapshots of signals or methods specifically directed towards weak signal acquisition
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: H04B 1/7075 with code phase acquisition
• CPC Class Codes: H04B 2201/70715 with application-specific features

Abstract

A satellite positioning system (SATPS) receiver has a mix of standard and enhanced digital channel processors. The standard digital channel processors perform continuous tracking. During a low SNR and/or fast acquisition mode, the enhanced digital channel processor accumulates samples of a SATPS signal that are identically positioned within corresponding PRN code repetition periods, and plays back the stored accumulated values of the samples in an integration period to a correlation section for correlation with a locally generated PRN code.

Claims

1-25. -25. (canceled)

26. An enhanced digital channel processor for a satellite positioning system (SATPS) receiver, comprising:

means for receiving data in successive data bit periods and integrating said data in an integration period longer than said data bit periods; and

a memory processor having a storage device comprising two storage parts, wherein, during a low SNR and/or fast acquisition mode, said memory processor accumulates sums representative of samples of a down-converted SATPS signal in said integration period, stores the accumulated sums in one of said storage parts, and plays back at a substantially accelerated rate the sums stored in the other of said storage parts.