System and method for reducing the effects of clock harmonic frequencies

• US 20060057970A1
• Filed: 08/17/2005
• Published: 03/16/2006
• Est. Priority Date: 11/29/2001
• Status: Active Grant

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Wireless Corporation (Kyocera Corporation)
• Inventors: Tan, Cheng, Curtiss, Troy, Kusbel, Patrick
• Granted Patent: US 7,103,342 B2
• Time in Patent Office: Days
• US Class Current: 455/69
• CPC Class Codes: H04B 15/04 the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
• CPC Class Codes: H04B 15/06 by local oscillators of receivers
• CPC Class Codes: H04B 2215/064 Reduction of clock or synthesizer reference frequency harmonics
• CPC Class Codes: H04B 2215/065 by changing the frequency of clock or reference frequency

Abstract

A system and a method are provided for reducing the effects of spurious frequencies in a wireless communications device. The system comprises a processor having a reference frequency input and a clock having an output connected to the processor input. The clock supplies a clock frequency, or reference frequency, to the processor. The reference frequency is the frequency at which the processor operates. The clock also has an input for selecting a reference frequency to provide to the processor. The system also includes a transceiver having a plurality of selectable communications passbands. If the wireless communications device is a telephone, for example, the transceiver frequency (passband) may change as a function of the mode in which the phone is operating (AMPS, PCS, GSM, CDMA, or W-CDMA). In response to changing operating modes (transceiver passband), the clock frequency is adjusted. The clock frequency is selected so that harmonic frequencies associated with the clock frequency do not substantially interfere with the transceiver passband.

Claims

1-7. -7. (canceled)

8. A method for reducing effects of spurious frequencies in a wireless communications device, the method comprising:

powering up the wireless communications device in a first mode of operation comprising one of an analog mode and a digital mode, the first mode of operation corresponding to a first passband frequency range of a plurality of selectable passband frequency ranges;

operating a processor in a default processor clock frequency of a plurality of processor clock frequencies, the default processor clock frequency corresponding to a second mode of operation comprising the other of the analog mode and the digital mode;

determining that the default processor clock frequency produces spurious signals in the first passband frequency range;

switching to a first processor clock frequency of the plurality of processor clock frequencies that produces no substantial spurious signals in the first mode of operation; and

maintaining the first processor clock frequency as song as the wireless communications device operates in the first mode of operation.

9. The method of claim 8, wherein the analog mode comprises advanced mobile phone service (AMPS).

10. The method of claim 8, wherein the digital mode comprises a code division multiple access (CDMA) mode.

11. The method of claim 8, wherein the first mode of operation is an analog mode;

and wherein the default processor clock frequency corresponds to a digital mode.

12. The method of claim 8, wherein the digital mode comprises one of a global system for mobile communications (GSM) mode, and a code division multiple access (CDMA) mode.

13. A wireless communication device comprising:

a microprocessor having a reference frequency input, a clock selection output, and a command selection output, the microprocessor for selecting one of at least two operation modes comprising a digital mode and an analog mode, and for outputting the selected operation mode on the command selection output;

a clock having a clock output connected to the reference frequency input of the microprocessor, and an input connected to the clock selection output of the microprocessor, the clock outputting a default frequency clock corresponding to a first operation mode of the at least two operation modes upon a start up condition, the first frequency clock producing a first set of harmonic frequencies;

a multiband transceiver for transceiving a plurality of selectable communication passbands, the multiband transceiver having at a transceiver input connected to the command selection output of the microprocessor, the plurality of selectable communication passbands comprising;

a first communication passband corresponding to the first operation mode; and

a second communication passband corresponding to a second operation mode, wherein the first set of harmonic frequencies interferes with the second communication passband;

wherein the microprocessor selects a second frequency clock having a second set of harmonic frequencies that do not interfere with the second communication passband when the second communication passband is active upon the start up condition, and maintains the second frequency clock on the reference frequency input as long as the second communication passband is selected.

14. The system of claim 13, wherein the analog mode comprises:

advanced mobile phone service (AMPS).

15. The system of claim 13, wherein the digital mode comprises one of

a global system for mobile communications (GSM) mode, and

a code division multiple access (CDMA) mode.

16. The system of claim 13, wherein the clock is connected to a crystal source, and the default frequency clock is a fundamental frequency of the crystal source.

17. The system of claim 13, wherein the second operation mode is an analog mode;

and wherein the default frequency clock corresponds to a digital mode.