System and method for providing a variable refresh rate of an interferometric modulator display

• US 20060066601A1
• Filed: 07/08/2005
• Published: 03/30/2006
• Est. Priority Date: 09/27/2004
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Chui, Clarence, Sethi, Gaurav, Sampsell, Jeffrey B., Kothari, Manish
• Granted Patent: US 8,878,825 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G02B 26/001 based on interference in an adjustable optical cavity interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 3/3466 based on interferometric effect
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

Embodiments includes methods and systems for updating display devices at a variable refresh rate. One embodiment includes a method of updating an image displayed on a display device. The method includes setting an indicator to a first state that indicates that image data has been received subsequent to a previous update of a display device and periodically updating at least a portion of the display device to display the image. The updating is deferred for at least one period when the indicator is in a state other than the first state. In another embodiment, updates of the display are substantially asynchronous and occur as the processor writes data to one or more shift registers. When a shift register is filled, for example, having received data for a row within the display, the data in the shift register is written to the display. Other embodiments include methods of manufacturing such devices.

Claims

1. A method of updating an image displayed on a display device, the method comprising:

receiving image data;

setting an indicator to a first state that indicates that said image data has been received subsequent to a previous update of a display device; and

periodically updating at least a portion of said display device to display the image, wherein said updating is deferred for at least one period when said indicator is in a state other than said first state.

2. The method of claim 1, wherein updating at least a portion of said display comprises setting said indicator to a second state.

3. The method of claim 1, wherein setting the state of said indicator comprises storing a value to a memory.

4. A device for driving a bistable display device, the device comprising:

a frame buffer configured to receive data indicative of an image;

an output circuit configured to generate a signal for updating a display device to display said image;

a memory operably connected to the frame buffer and configured to indicate whether said frame buffer has received data subsequent to updating of said display; and

a controller configured to control, based on a content of said memory, when said output circuit generates said signal.

5. The device of claim 4, wherein the controller is configured to determine, at specified time intervals, whether at least a portion of the memory indicates that said frame buffer has received data subsequent to updating of said display.

6. The device of claim 4, further comprising:

a processor configured to provide the data indicative of the image to the frame buffer,

wherein said time intervals are specified by software executing on said processor.

7. The device of claim 6, wherein said software executing on said processor comprises operating system software.

8. The device of claim 6, wherein said software executing on said processor comprises application software.

9. The device of claim 4, further comprising:

a timing circuit configured to send a timing signal at a specified time interval to said controller, wherein said controller is configured to control said output circuit based on said timing signal.

10. The device of claim 4, wherein the display device comprises a plurality of display elements arranged in a plurality of lines, and wherein the content of the memory indicates whether the driver has updated each of the plurality of lines of the display device to display a corresponding portion of the image.

11. The device of claim 10, wherein the lines comprise rows.

12. The device of claim 10, wherein the lines comprise columns.

13. The device of claim 10, wherein the controller is configure to control whether the driver generates a strobe signal for each of the lines based on the content of the memory.

14. The device of claim 4, wherein the frame buffer is configured to receive the data over a bus, and wherein the memory is operably connected to the bus.

15. The device of claim 14, wherein the content of the memory is updated in response to receiving a write signal over the bus.

16. The device of claim 4, wherein the content of the memory is changed in response to the output circuit generating the signal.

17. The device of claim 16, wherein the controller changes the content of the memory.

18. The device of claim 16, wherein the output circuit is operably connected to the memory and configured to change the content of the memory.

19. An electronic device, the device comprising:

a display device;

a frame buffer configured to receive image data;

a driver circuit configured to periodically generate a signal for updating said display device to display said image data;

a memory operably connected to the frame buffer and configured to indicate whether said frame buffer has received data subsequent to updating of said display;

wherein said circuit is configured to generate said signal only when said memory indicates whether said frame buffer has received data subsequent to updating of said display.

20. The electronic device of claim 19, further comprising:

a processor that is in electrical communication with said display, said processor being configured to process image data;

a memory device in electrical communication with said processor.

21. The electronic device of claim 19, further comprising:

an image source module configured to send said image data to said processor.

22. The electronic device of claim 21, wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

23. The electronic device of claim 22, further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

24. A device for driving a bistable display device, the device comprising:

means for receiving and storing data indicative of an image;

means for generating a signal for updating a display device to display said image;

means for indicating whether said means for receiving and storing has received data subsequent to updating of said display; and

means for controlling, based on a content of said memory, when said means for generating generates said signal.

25. The device of claim 24, wherein the means for controlling periodically controls said means for generating to generate said signal, the periodic control being performed at specified time intervals.

26. The device of claim 24, comprising means for generating to send a timing signal at a specified time interval to said means for controlling, wherein said means for controlling is configured to control said means for generating based on said timing signal.

27. The device of claim 24, wherein the display device comprises a plurality of display elements arranged in a plurality of lines, and wherein the content of the means for indicating indicates whether the means for generating has updated each of the plurality of lines of the display device to display a corresponding portion of the image.

28. A device for asynchronously driving a bistable display device, the device comprising:

a circuit configured to asynchronously receive a line of data indicative of a portion of an image; and

an output circuit configured to update a display device to display the portion of the image,

wherein the circuit is configured to provide the line of data to the output circuit upon receiving the line of data.

29. The device of claim 28, wherein the circuit comprises at least one shift register.

30. The device of claim 28, wherein the circuit comprises a memory.

31. The device of claim 28, further comprising:

a display device in electrical communication with said output circuit;

a processor that is in electrical communication with said display device, said processor being configured to process image data and asynchronously provide the data to the circuit;

a memory device in electrical communication with said processor.

32. The device of claim 31, further comprising:

a bus, wherein the processor is configured to asynchronously provide the data to the circuit over the bus.

33. The device of claim 32, wherein said bus comprises a serial bus.

34. The device of claim 31, further comprising:

an image source module configured to send said image data to said processor.

35. The device of claim 34, wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

36. The device of claim 31, further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

37. A device for asynchronously driving a bistable display device, the device comprising:

means for asynchronously receiving a line of data indicative of a portion of an image; and

means for generating a signal to update a display device to display said portion of the image,

wherein the means for asynchronously receiving comprises means for providing said line of data to the means for generating upon receiving the line of data.

38. The device of claim 37, further comprising:

means for processing image data and asynchronously providing the data to the means for asynchronously receiving;

a means for storing data in electrical communication with said processor.

39. The device of claim 38, further comprising:

means for communicating data, wherein said means for processing is configured to asynchronously provide the data to the means for asynchronously receiving over the means for communicating data.