Securing electronic annotations

• US 20060071754A1
• Filed: 09/29/2005
• Published: 04/06/2006
• Est. Priority Date: 10/01/2004
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: McDonnell, James Thomas Edward, Tofts, Christopher
• Granted Patent: US 7,623,022 B2
• Time in Patent Office: Days
• US Class Current: 340/5.220
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 19/086 with markings consisting of randomly placed or oriented elements, the randomness of the elements being useable for generating a unique identifying signature of the record carrier, e.g. randomly placed magnetic fibers or magnetic particles in the body of a credit card

Abstract

This invention describes methods for securing access to an electronic annotation provided on an object, including the steps of providing the object with a plurality of memory tags, providing an electronic annotation on at least one of the memory tags, and defining a sequence in which the memory tags must be accessed in order to access the annotation.

Claims

1. A method of securing access to an electronic annotation provided on an object, comprising the steps of:

providing the object with a plurality of memory tags;

providing on at least one of the memory tags an electronic annotation; and

defining a sequence in which the memory tags must be accessed in order to access the annotation.

2. A method as claimed in claim 1 wherein the plurality of memory tags are provided on the object in a predetermined pattern.

3. A method as claimed in claim 1, wherein defining the sequence includes the step of defining an access code for the second and each subsequent memory tag in the sequence.

4. A method as claimed in claim 3, also including defining an access code for the first memory tag in the sequence.

5. A method as claimed in claim 3, wherein the access code for each nth memory tag in the sequence is provided in the n-1 th memory tag.

6. A method as claimed in claim 5, wherein the step of defining a sequence includes configuring the second and each subsequent memory tag in the sequence up to memory tag n-1 to receive a code, compare that code with the defined access code and, if they match, to output the access code for the memory tag next in the sequence, where n is the total number of memory tags in the sequence.

7. A method as claimed in claim 6, wherein the step of defining a sequence includes configuring the second and each subsequent memory tag to output an incorrect access code if the received code and defined access code do not match.

8. A method as claimed in claim 3, wherein the first memory tag in the sequence is configured to output the access code defined for the second memory tag in the sequence upon being validly accessed.

9. A method as claimed in claim 2, including the step of providing the object with one or more memory tags which are not a part of the defined sequence.

10. A method as claimed in claim 9, wherein the one or more memory tags that are not a part of the defined sequence are each provided with a code which is output when the tag is accessed.

11. A method as claimed in claim 1, wherein the annotation is provided on a final memory tag in the sequence.

12. A method as claimed in claim 1, wherein the annotation is provided on two or more memory tags within the sequence.

13. A method as claimed in claim 11, including the step of configuring a memory tag upon which the annotation is stored to output that annotation upon receipt of a valid access code.

14. A method as claimed in claim 12, including the step of providing the final memory tag in the sequence with a master access code which allows access to all memory tags in the sequence, and configuring it to output that master access code upon receipt of a valid access code.

15. A method as claimed in claim 14, including the further step of configuring each memory tag in which the electronic annotation is stored, upon receipt of the master access code, to output the electronic annotation.

16. A method as claimed in claim 3, wherein the step of defining a sequence includes defining repeat visits to at least one of the provided memory tags, and providing at that memory tag the access code for each next memory tag in the sequence.

17. A method as claimed in claim 16, including the step of configuring the at least one memory tag to determine the correct access code for output in accordance with the sequence and a number of accesses of that tag.

18. An electronically annotated object having annotation access security comprising:

a plurality of memory tags arranged on or in the object, at least one of the memory tags having stored therein an electronic annotation; and

wherein the memory tags are ordered into a sequence such that access to the electronic annotation can only be achieved by accessing the memory tags in the sequence in the prescribed order.

19. An object as claimed in claim 18, wherein the plurality of memory tags are arranged in a predetermined pattern on the object.

20. An object as claimed in claim 18, also including one or more memory tags which are not a part of the sequence arranged on or in the object.

21. An object as claimed in claim 20, wherein each memory tag that is not part of the sequence has stored thereon a code which is output when that memory tag is accessed.

22. An object as claimed in claim 18, wherein the annotation is stored in a last memory tag in the sequence.

23. An object as claimed in claim 18, wherein the annotation is stored in two or more memory tags within the sequence.

24. An object as claimed in claim 22, wherein a processor of a memory tag upon which the annotation is stored is configured to output the annotation upon receipt of a valid access code.

25. An object as claimed in claim 18, wherein the object is a document.

26. An object as claimed in claim 18, wherein each memory tag is approximately 2 mm².

27. An object as claimed in claim 18, wherein each memory tag has a memory capacity of at least approximately 1 Mbit.

28. An object as claimed in claim 18, wherein each memory tag has a range at which it is accessible by a reader device.

29. An object as claimed in claim 28, wherein the range is approximately 3 to 4 mm.

30. An object as claimed in claim 28, wherein the range is approximately 1.5 mm.

31. A method of accessing a secured electronic annotation applied to an object, comprising the steps of:

a) with a memory tag reader, reading from a first memory tag in a defined sequence of memory tags on the object an access code for a next memory tag in the sequence;

b) applying the access code to the next memory tag in the sequence;

c) reading from that memory tag an access code for a next memory tag in the sequence;

d) repeating steps b) and c) for all memory tags in the sequence up to n-1, where n is the total number of tags in the sequence;

e) applying the access code to the nth tag in the sequence; and

f) reading the annotation from at least one of the memory tags within the sequence.

32. A method as claimed in claim 31, wherein applying an access code comprises, positioning the reader proximate a memory tag, powering up the memory tag with the reader, and providing to the memory tag the access code.

33. A method as claimed in claim 31, wherein if a memory tag not in the sequence is read or a memory tag is read out of sequence in steps a), c) or d), reading from the memory tag an access code that will not access a memory tag in the sequence.

34. A method as claimed in claim 31, comprising the further step of, in a memory tag to which an access code is applied, comparing the applied access code to a valid code stored in the memory tag and, if they match, enabling reading from the memory tag.

35. A method as claimed in claim 31, comprising the further step of, in a memory tag to which an access code is applied, comparing the applied access code to a valid code stored in the memory tag and, if they do not match, providing an incorrect access code as output and inhibiting step f) for that tag.

36. A method as claimed in claim 31, wherein the annotation is stored on the last memory tag in the sequence, and step f) is carried out after step e).

37. A method as claimed in claim 31, wherein the annotation is stored on two or more memory tags in the sequence, and step f) is carried out alongside the step of reading the access code from each non-final memory tag.

38. A method as claimed in claim 31, wherein step f) includes the following steps:

i) reading from the nth tag in the sequence of memory tags a master code that allows access to all memory tags in the sequence;

ii) moving the reader into proximity with each memory tag that contains annotation data;

iii) providing the master code to each tag mentioned in step ii); and

iv) reading from each tag the annotation data.

39. A method as claimed in claim 38, wherein, in each memory tag provided with the master code, the step of comparing the received master code with a valid master code stored in the memory tag is carried out, and if the codes match, the annotation is output.