Filters for communication systems

• US 20060083297A1
• Filed: 10/13/2005
• Published: 04/20/2006
• Est. Priority Date: 10/13/2004
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Yan, Aiguo, Shabra, Ayman
• Granted Patent: US 8,417,750 B2
• Time in Patent Office: Days
• US Class Current: 375/232
• CPC Class Codes: H03H 17/0657 where the output-delivery frequency is higher than the input sampling frequency, i.e. interpolation
• CPC Class Codes: H03H 17/0664 where the output-delivery frequency is lower than the input sampling frequency, i.e. decimation
• CPC Class Codes: H04L 25/03834 using pulse shaping

Abstract

The invention relates to a cascaded scheme in which an RRC filter, a modified RRC filter or other digital filter is implemented at a relatively low data rate, such as twice the symbol or chip rate, or 2×. Interpolation filters are used to increase the data rate to a higher data rate, such as 8×. Decimation filters are used to reduce the data rate from a higher rate, such as 8×, to a lower rate, such as 2×. The coefficients of the digital filter may be adjusted to compensate for characteristics of other components across the entire filter chain. Most of the implementation complexity of the filter chain is consolidated into the relatively low rate (such as 2×) digital filter while interpolation or decimation filters can be implemented at very low cost. The compensation capability provided by the digital filter makes design of simple decimation or interpolation filters much easier. The compensation capability provided by the digital filter, along with the relatively high over-sampling rate for the output of the interpolation filter (or the input of the decimation filter), also makes the design of the preceding (or following) analog filters much easier.

Claims

1. A filter having an output at a first data rate, comprising:

a digital filter which operates at a second data rate that is lower than the first data rate; and

an interpolation filter connected in series with the digital filter, wherein the interpolation filter increases the data rate from the second data rate to the first data rate.

2. A filter as defined in claim 1, wherein the digital filter comprises a modified Root-Raised-Cosine filter.

3. A filter as defined in claim 1, wherein the digital filter is implemented in a more advanced technology and the interpolation filter is implemented in a less advanced technology.

4. A filter as defined in claim 1, wherein the digital filter comprises a Root-Raised-Cosine filter.

5. A filter as defined in claim 1, wherein the second data rate, consistent with sampling theory, is the lowest sampling rate which is an integer multiple of a symbol or chip rate.

6. A filter as defined in claim 1, wherein multiplication is not required in the interpolation filter.

7. A filter as defined in claim 1, wherein the digital filter and the interpolation filter are implemented on separate integrated circuit chips and wherein the digital filter communicates with the interpolation filter at the lowest sampling rate which is an integer multiple of a symbol or chip rate.

8. A filter as defined in claim 1, wherein the digital filter has programmable coefficients.

9. A filter as defined in claim 8, wherein coefficients of the digital filter are selected to compensate for characteristics of the interpolation filter and other components across an entire filter chain.

10. A filter as defined in claim 1, wherein the digital filter is relatively complex and the interpolation filter is relatively simple.

11. A filter as defined in claim 1, wherein the first data rate is a multiple of a symbol rate in a wireless communication system.

12. A filter as defined in claim 1, wherein the first data rate is a multiple of a chip rate in a wireless communication system.

13. A filter as defined in claim 1, wherein the interpolation filter is a low pass filter.

14. A filter as defined in claim 13, wherein the low pass filter is a low pass filter which can be implemented with low cost.

15. A filter as defined in claim 1, wherein the digital filter is located on a digital baseband processor of a wireless communication system and the interpolation filter is located on an analog baseband processor of the wireless communication system.

16. A method for filtering a signal and providing an output at a first data rate, comprising:

digital filtering the signal in a digital filter at a second data rate that is lower than the first data rate; and

interpolation filtering the output of the digital filter in an interpolation filter, wherein the interpolation filter increases the data rate from the second data rate to the first data rate.

17. A method as defined in claim 16, wherein multiplications are not performed in the interpolation filtering step.

18. A method as defined in claim 16, further comprising programming coefficients of the digital filter.

19. A method as defined in claim 16, further comprising adjusting coefficients of the digital filter to compensate for characteristics of the interpolation filter and other components across an entire filter chain.

20. A method as defined in claim 16, further comprising transmitting data between the digital filter and the interpolation filter at a relatively low data rate.

21. A filter having an input at a first data rate, comprising:

a decimation filter which receives the input at the first data rate and decreases the data rate from the first data rate to a second data rate that is lower than the first data rate; and

a digital filter connected in series with the decimation filter, wherein the digital filter operates at the second data rate.

22. A filter as defined in claim 21, wherein the digital filter comprises a modified Root-Raised-Cosine filter.

23. A filter as defined in claim 21, wherein the digital filter is implemented in a more advanced technology and the decimation filter is implemented in a less advanced technology.

24. A filter as defined in claim 21, wherein the digital filter comprises a Root-Raised-Cosine filter.

25. A filter as defined in claim 21, wherein the second data rate, consistent with sampling theory, is the lowest sampling rate which is an integer multiple of a symbol or chip rate.

26. A filter as defined in claim 21, wherein multiplication is not required in the decimation filter.

27. A filter as defined in claim 21, wherein the digital filter and the decimation filter are implemented on separate integrated circuits and wherein the decimation filter communicates with the digital filter at the lowest sampling rate which is an integer multiple of a symbol or chip rate.

28. A filter as defined in claim 21, wherein the digital filter has programmable coefficients.

29. A filter as defined in claim 28, wherein coefficients of the digital filter are selected to compensate for characteristics of the decimation filter and other components across an entire filter chain.

30. A filter as defined in claim 21, wherein the digital filter is relatively complex and the decimation filter is relatively simple.

31. A filter as defined in claim 21, wherein the first data rate is a multiple of a symbol rate in a wireless communication system.

32. A filter as defined in claim 21, wherein the first data rate is a multiple of a chip rate in a wireless communication system.

33. A filter as defined in claim 21, wherein the decimation filter is a low pass filter.

34. A filter as defined in claim 33, wherein the low pass filter is a low pass filter which can be implemented with low cost.

35. A filter as defined in claim 21, wherein the digital filter is located on a digital baseband processor of a wireless communication system and the decimation filter is located on an analog baseband processor of the wireless communication system.

36. A method for filtering an input signal at a first data rate, comprising:

decimation filtering the input signal in a decimation filter, wherein the decimation filter decreases the data rate from the first data rate to a second data rate that is lower than the first data rate; and

digital filtering the output of the decimation filter in a digital filter at the second data rate.

37. A method as defined in claim 36, wherein multiplications are not performed in the decimation filtering step.

38. A method as defined in claim 36, further comprising programming coefficients of the digital filter.

39. A method as defined in claim 36, further comprising adjusting coefficients of the digital filter to compensate for characteristics of the decimation filter and other components across an entire filter chain.

40. A method as defined in claim 36, further comprising transmitting data between the decimation filter and the digital filter at a relatively low data rate.