Chipset activation
First Claim
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1. A method, comprising:
- a first device determining whether a second device is permitted to be activated;
the first device activating the second device if the second device is permitted to be activated; and
the first device reducing the functionality of the second device if the second device is not permitted to be activated.
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Abstract
A method and system are disclosed. In one embodiment the method comprises a first device determining whether a second device is permitted to be activated, the first device activating the second device if the second device is permitted to be activated, and the first device reducing the functionality of the second device if the second device is not permitted to be activated.
19 Citations
29 Claims
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1. A method, comprising:
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a first device determining whether a second device is permitted to be activated;
the first device activating the second device if the second device is permitted to be activated; and
the first device reducing the functionality of the second device if the second device is not permitted to be activated. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method, comprising:
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a first device determining whether a function within a second device is permitted to be activated;
the first device activating the function within the second device if it is permitted to be activated; and
the first device not activating the function within the second device if it is not permitted to be activated. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A system, comprising:
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a bus;
a processor coupled to the bus;
a chipset coupled to the bus; and
a memory coupled to the bus, the memory adapted for storing instructions, which upon execution by the processor;
determines whether the chipset is permitted to be activated;
activates the chipset if the chipset is permitted to be activated; and
reduces the functionality of the chipset if the chipset is not permitted to be activated. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A system, comprising:
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a bus;
a chipset coupled to the bus; and
a processor coupled to the bus, the processor operable to;
determine whether the chipset is permitted to be activated;
activate the chipset if the chipset is permitted to be activated; and
reduce the functionality of the chipset if the chipset is not permitted to be activated. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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Specification