Semiconductor device manufacturing method, semiconductor device, laminated semiconductor device, circuit substrate, and electronic apparatus

• US 20060131713A1
• Filed: 12/16/2005
• Published: 06/22/2006
• Est. Priority Date: 12/21/2004
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Fukazawa, Motohiko
• Granted Patent: US 7,387,949 B2
• Time in Patent Office: Days
• US Class Current: 257/685
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/06135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

A semiconductor device includes a semiconductor element, a penetrating electrode which penetrates the semiconductor element, and a resin layer which selectively covers side walls and corners of the semiconductor element.

Claims

1. A semiconductor device manufacturing method comprising:

affixing a semiconductor wafer, which includes a plurality of semiconductor element sections which a conductive material is buried in, to a supporting body via an adhesive layer;

forming a penetrating electrode which penetrates the plurality of semiconductor element sections and has the conductive material, by thinning the semiconductor wafer;

cutting the semiconductor wafer so that the supporting body remains, and dividing the semiconductor wafer into the plurality of semiconductor element sections;

forming a resin layer which selectively covers side walls and corners of the plurality of semiconductor element sections formed by cutting the semiconductor wafer; and

peeling the semiconductor element sections from the supporting body.

2. The semiconductor device manufacturing method according to claim 1, wherein the forming of the resin layer has:

applying resin in selective regions on the semiconductor wafer which include gaps between the plurality of semiconductor elements formed by cutting the semiconductor wafer; and

splitting the resin which is buried in the gaps.

3. The semiconductor device manufacturing method according to claim 2, wherein, in the splitting of the resin, the resin layer has a positive photosensitive resin which is exposed and developed.

4. The semiconductor device manufacturing method according to claim 1, wherein the resin layer additionally covers a periphery of the penetrating electrode.

5. The semiconductor device manufacturing method according to claim 1, wherein, in the peeling the semiconductor element sections, ultraviolet rays which reduce the adhesion of the adhesive layer are applied to the adhesive layer.

6. A semiconductor device comprising:

a semiconductor element;

a penetrating electrode which penetrates the semiconductor element; and

a resin layer which selectively covers the semiconductor element.

7. The semiconductor device according to claim 6, wherein the resin layer selectively covers corners of the semiconductor element.

8. The semiconductor device according to claims 6, wherein

the penetrating electrode protrudes from an active face and a rear face of the semiconductor element;

and

the resin layer additionally and selectively covers the periphery of the penetrating electrode on the rear face of the semiconductor element.

9. A laminated semiconductor device comprising:

a plurality of the semiconductor devices according to claim 6, the plurality of semiconductor devices being laminated together.

10. A circuit substrate comprising:

the semiconductor device according to claim 6.

11. A circuit substrate comprising:

the laminated semiconductor device according to claim 9.

12. An electronic apparatus comprising:

the circuit substrate according to claim 10.

13. An electronic apparatus comprising:

the circuit substrate according to claim 11.