Inductor and capacitor-based clock generator and timing/frequency reference

• US 20060158267A1
• Filed: 03/20/2006
• Published: 07/20/2006
• Est. Priority Date: 03/22/2004
• Status: Active Grant

• Current Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Original Assignee: Mobius Microsystems, Inc. (Renesas Electronics Corporation)
• Inventors: McCorquodale, Michael Shannon, Pernia, Scott Michael, Kubba, Sundus
• Granted Patent: US 7,504,899 B2
• Time in Patent Office: Days
• US Class Current: 331/34
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: H03B 2201/025 the means being an electronic switch for switching in or out oscillator elements
• CPC Class Codes: H03B 5/06 Modifications of generator to ensure starting of oscillations
• CPC Class Codes: H03B 5/1212 the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1221 the amplifier comprising multiple amplification stages connected in cascade
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/124 the means comprising a voltage dependent capacitance
• CPC Class Codes: H03J 1/0008 using a central processing unit, e.g. a microprocessor digital tuning in general H03J5/0245
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 1/022 by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature H03L1/021 takes precedence
• CPC Class Codes: H03L 3/00 Starting of generators
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop
• CPC Class Codes: H03L 7/0812 and where no voltage or current controlled oscillator is used
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop

Abstract

In various embodiments, the invention provides a clock generator and/or a timing and frequency reference comprising an LC oscillator with a frequency controller to control and provide a stable resonant frequency. Such stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the oscillator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

Claims

1. An apparatus for providing a first reference signal, the apparatus comprising:

an oscillator comprising an inductor and a capacitor, the oscillator adapted to provide the first reference signal having a first frequency;

a voltage controller adapted to provide a plurality of voltage control signals; and

a plurality of switchable, controlled reactance modules coupled to the oscillator and to the voltage controller, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency.

2. The apparatus of claim 1, further comprising:

a square-wave generator coupled to the oscillator, the square-wave generator adapted to convert the first reference signal into a square-wave reference signal or clock signal.

3. The apparatus of claim 1, further comprising:

a processor coupled to the square-wave generator and forming an integrated circuit with the apparatus.

4. The apparatus of claim 1, wherein the oscillator has a double-balanced, differential LC configuration.

5. The apparatus of claim 1, wherein the oscillator has at least one configuration of the following configurations:

a double-balanced, differential LC configuration;

a differential n-MOS cross-coupled topology;

a differential p-MOS cross-coupled topology;

a single-ended Colpitts LC configuration;

a single-ended Hartley LC configuration;

a differential, common base Colpitts LC configuration;

a differential, common collector Colpitts LC configuration;

a differential, common base Hartley LC configuration;

a differential, common collector Hartley LC configuration;

a single-ended Pierce LC oscillator, or a quadrature LC oscillator configuration.

6. The apparatus of claim 1, wherein the inductor is an active inductor or is a passive inductor comprising a coil formed in a CMOS-compatible conductive layer.

7. The apparatus of claim 1, further comprising:

a coefficient register coupled to the plurality of switchable, controlled reactance modules, the coefficient register adapted to store a plurality of coefficients and to provide a corresponding coefficient to control switching of a corresponding controlled reactance module to the oscillator.

8. The apparatus of claim 7, wherein the plurality of switchable, controlled reactance modules further comprise:

a plurality of switches coupled to the coefficient register; and

a plurality of variable capacitors correspondingly coupled to the plurality of switches and to the voltage controller, the plurality of variable capacitors adapted to provide a selected capacitance in response to a corresponding control voltage.

9. The apparatus of claim 8, wherein the plurality of switchable, controlled reactance modules further comprise:

a plurality of fixed capacitors correspondingly coupled to the plurality of switches, the plurality of fixed capacitors adapted to provide a selected capacitance in response to a corresponding coefficient.

10. The apparatus of claim 7, wherein the plurality of coefficients are determined post-fabrication by calibration to a second, reference frequency signal.

11. The apparatus of claim 1, wherein the oscillator further comprises a transconductance amplifier having a variable current source, the variable current source adapted to provide a corresponding current in response to ambient or operating temperature.

12. An apparatus for providing a first reference signal the apparatus comprising:

a harmonic oscillator comprising an inductor and a capacitor, the harmonic oscillator adapted to provide the first reference signal having a first frequency and to operate without locking to an external reference signal;

a plurality of resistive modules adapted to generate a plurality of voltage control signals;

a plurality of controlled reactance modules coupled to the harmonic oscillator and to the plurality of resistive modules, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency;

a coefficient register coupled to the plurality of switches, the coefficient register adapted to store a plurality of switching coefficients; and

a plurality of switches coupled to the plurality of resistive modules and to the plurality of controlled reactance modules, each switch of the plurality of switches responsive to a corresponding switching coefficient to couple a selected control voltage of the plurality of control voltages to a corresponding controlled reactance module.

13. The apparatus of claim 12, wherein the plurality of switches are further responsive to a corresponding switching coefficient to couple a corresponding controlled reactance module of the plurality of controlled reactance modules to the harmonic oscillator to modify the first frequency.

14. The apparatus of claim 12, wherein the harmonic oscillator has at least one configuration of the following configurations:

a double-balanced, differential LC configuration;

a differential n-MOS cross-coupled topology;

a differential p-MOS cross-coupled topology;

a single-ended Colpitts LC configuration;

a single-ended Hartley LC configuration;

a differential, common base Colpitts LC configuration;

a differential, common collector Colpitts LC configuration;

a differential, common base Hartley LC configuration;

a differential, common collector Hartley LC configuration;

a single-ended Pierce LC oscillator, or a quadrature LC oscillator configuration.

15. The apparatus of claim 12, wherein the plurality of controlled reactance modules further comprise:

a plurality of variable capacitors correspondingly coupled to the plurality of switches and to the voltage controller, the plurality of variable capacitors adapted to provide a selected capacitance in response to a corresponding control voltage; and

a plurality of fixed capacitors correspondingly coupled to the plurality of switches, the plurality of fixed capacitors adapted to provide a selected capacitance in response to a corresponding switching coefficient.

16. The apparatus of claim 12, wherein at least one control voltage of the plurality of control voltages is responsive to a parameter of a plurality of parameters, wherein the plurality of parameters are variable and comprise at least one of the following parameters:

temperature, fabrication process, voltage, age, and frequency.

17. The apparatus of claim 16, further comprising:

a current source coupled to the plurality of resistive modules, the current source adapted to provide a parameter-dependent current to at least one resistive module of the plurality of resistive modules to generate at least one control voltage, of the plurality of control voltages, which is parameter-dependent.

18. The apparatus of claim 17, wherein the current source has at least one complementary to absolute temperature (CTAT) configuration, proportional to absolute temperature (PTAT) configuration, or proportional to absolute temperature squared (PTAT²) configuration.

19. The apparatus of claim 12, wherein the plurality of controlled reactance modules further comprise a plurality of differently-weighted fixed capacitances and variable capacitances, and wherein the plurality of switches are responsive to the plurality of switching coefficients to couple a fixed capacitance to the harmonic oscillator and to couple a first control voltage of the plurality of control voltages to a variable capacitance coupled to the harmonic oscillator.

20. The apparatus of claim 12, wherein the plurality of controlled reactance modules further comprise:

a plurality of differently-weighted switchable capacitive modules coupled to the coefficient register and to the harmonic oscillator, each switchable capacitive module having a first fixed capacitance and a second fixed capacitance, each switchable capacitive module responsive to a corresponding coefficient of the plurality of coefficients to switch between the first fixed capacitance and the second fixed capacitance.

21. The apparatus of claim 12, wherein the plurality of controlled reactance modules further comprise:

at least one switchable variable capacitive module coupled to the coefficient register and to the harmonic oscillator, the at least one switchable variable capacitive module responsive to a corresponding coefficient of the plurality of coefficients to switch between a first voltage and a second voltage of a plurality of control voltages.

22. The apparatus of claim 12, wherein the plurality of controlled reactance modules further comprise:

a plurality of switchable variable capacitive modules coupled to the coefficient register and to the harmonic oscillator, each switchable variable capacitive module responsive to a corresponding coefficient of the plurality of coefficients to switch to a selected control voltage of a plurality of control voltages, the plurality of control voltages comprising a plurality of different magnitude voltages, and wherein the selected control voltage is substantially constant over temperature variations.

23. The apparatus of claim 12, further comprising:

a plurality of dividers coupled to the oscillator, the plurality of dividers or adapted to provide a corresponding plurality of second reference signals having a plurality of corresponding frequencies.

24. The apparatus of claim 12, further comprising:

a mode selector coupled to the frequency selector, the mode selector adapted to provide a plurality of operating modes, the plurality of operating modes selected from a group comprising a clock mode, a timing and frequency reference mode, a power conservation mode, and a pulse mode.

25. The apparatus of claim 12, further comprising:

a square-wave generator coupled to the harmonic oscillator, the square-wave generator adapted to convert the frequency reference signal into a square-wave clock signal having a substantially equal duty cycle.

26. The apparatus of claim 25, further comprising:

a processor coupled to the square-wave generator and forming an integrated circuit with the apparatus.

27. The apparatus of claim 12, further comprising:

a plurality of dividers or locking circuits coupled to the harmonic oscillator, the plurality of dividers or locking circuits adapted to provide a corresponding plurality of second reference signals having a plurality of corresponding frequencies.

28. The apparatus of claim 27, further comprising:

control circuitry coupled to the plurality of dividers or locking circuits, the control circuitry adapted to provide a control signal to the plurality of dividers or locking circuits to modify a divide ratio to provide a spread-spectrum second reference signal of the plurality of plurality of second reference signals.

29. The apparatus of claim 27, further comprising:

control circuitry coupled to the plurality of controlled reactance modules, the control circuitry adapted to provide a control signal to the plurality of controlled reactance modules to selectively switch the plurality of controlled reactance modules to modify the first frequency to provide a spread-spectrum first reference signal.

30. An integrated circuit for providing a plurality of output reference signals, the integrated circuit comprising:

an oscillator comprising an inductor and a capacitor, the oscillator adapted to provide a frequency reference signal having a resonant frequency;

a sensor adapted to provide a second signal in response to at least one parameter of a plurality of parameters;

a

a voltage controller adapted to provide a plurality of voltage control signals;

a plurality of switchable, controlled reactance modules coupled to the oscillator and to the voltage controller, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the resonant frequency;

a frequency divider coupled to the oscillator and adapted to provide the frequency reference signal having a first frequency; and

a plurality of phase-locked loops coupled to the frequency divider, each phase-locked loop of the plurality of phase-locked loops having a corresponding divide ratio of a plurality of different divide ratios, each phase-locked loop of the plurality of phase-locked loops adapted to phase lock to the frequency reference signal and provide an output signal having an output frequency determined from the first frequency and the corresponding divide ratio.

31. The integrated circuit of claim 30, wherein the plurality of parameters are variable and comprise at least one of the following parameters:

temperature, fabrication process, voltage, age, and frequency.

32. The integrated circuit of claim 30, wherein the oscillator has at least one configuration of the following configurations:

a double-balanced, differential LC configuration;

a differential n-MOS cross-coupled topology;

a differential p-MOS cross-coupled topology;

a single-ended Colpitts LC configuration;

a single-ended Hartley LC configuration;

a differential, common base Colpitts LC configuration;

a differential, common collector Colpitts LC configuration;

a differential, common base Hartley LC configuration;

a differential, common collector Hartley LC configuration;

a single-ended Pierce LC oscillator, or a quadrature LC oscillator configuration.

33. The integrated circuit of claim 32, further comprising:

a coefficient register coupled to the plurality of switchable, controlled reactance modules, the coefficient register adapted to store a plurality of coefficients and to provide a corresponding coefficient to control switching of a corresponding controlled reactance module to the oscillator.

34. The integrated circuit of claim 30, wherein the plurality of switchable, controlled reactance modules further comprise:

a plurality of switches coupled to the coefficient register; and

a plurality of variable capacitors correspondingly coupled to the plurality of switches and to the voltage controller, the plurality of variable capacitors adapted to provide a selected capacitance in response to a corresponding control voltage.

35. The integrated circuit of claim 34, wherein the plurality of switchable, controlled reactance modules further comprise:

a plurality of fixed capacitors correspondingly coupled to the plurality of switches, the plurality of fixed capacitors adapted to provide a selected capacitance in response to a corresponding coefficient.

36. The apparatus of claim 30, wherein the sensor comprises a variable current source, the variable current source adapted to provide a corresponding current in response to ambient or operating temperature.

37. An integrated circuit for providing a first reference signal and having an integrated processor, the integrated circuit comprising:

a harmonic oscillator comprising an inductor and a capacitor, the harmonic oscillator adapted to provide the first reference signal having a first frequency;

a plurality of resistive modules adapted to generate a plurality of voltage control signals;

a plurality of controlled capacitance modules coupled to the harmonic oscillator and to the plurality of resistive modules, each capacitance module of the plurality of capacitance modules adapted to provide a selected capacitance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency;

a coefficient register coupled to the plurality of switches, the coefficient register adapted to store a plurality of switching coefficients;

a plurality of switches coupled to the plurality of resistive modules and to the plurality of controlled capacitance modules, each switch of the plurality of switches responsive to a corresponding switching coefficient to couple a selected control voltage of the plurality of control voltages to a corresponding controlled capacitance module;

a divider circuit coupled to the harmonic oscillator and adapted to convert the first reference signal into a substantially square-wave clock signal having a substantially equal duty cycle; and

a processor coupled to the divider circuit and adapted to receive the clock signal.