Optical mask and manufacturing method of thin film transistor array panel using the optical mask

• US 20060160279A1
• Filed: 12/20/2005
• Published: 07/20/2006
• Est. Priority Date: 01/17/2005
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Jeong-Min, Kim, Joo-Han, Jung, Doo-Hee, Jeon, Woo-Seok, Lee, Hi-kuk
• Granted Patent: US 7,371,592 B2
• Time in Patent Office: Days
• US Class Current: 438/149
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon

Abstract

A photo mask is provided. The mask includes: a transmitting area and a translucent area, wherein the translucent area includes a plurality of light blocking portions blocking light, and wherein the light blocking portions have a plurality of areas blocking different amounts of light. By using this type of photo mask, a substantially flat layer of photoresist film can be deposited even on top of an uneven surface. The flat photorseist film reduces processing cost and enhances the reliability of the panel manufacturing process.

Claims

1. A photo mask comprising:

a transmitting area; and

a translucent area,

wherein the translucent area includes a plurality of light blocking portions blocking light, and

wherein the light blocking portions have a plurality of areas blocking different amounts of light.

2. The photo mask of claim 1, wherein the light blocking portions are arranged substantially in parallel and have a stripe shape.

3. The photo mask of claim 1, wherein the respective areas of the light blocking portions have different widths.

4. The photo mask of claim 2, wherein the photo mask varies an amount of light blocked by adjusting an interval between adjacent light blocking portions.

5. The photo mask of claim 1, wherein the photo mask further comprises a complete light blocking area.

6. A method of manufacturing a thin film transistor array panel, the method comprising:

forming a gate line on a substrate;

forming a first insulating layer on the gate line;

forming a semiconductor layer on the first insulating layer;

forming a data line, a drain electrode, and a storage capacitor conductor on the semiconductor layer;

depositing a second insulating layer on the data line, the drain electrode, and the storage capacitor conductor;

forming a photoresist including a first portion and a second portion to be thinner than the first portion on the second insulating layer by exposing it to light through a photo mask and developing;

etching the second and first insulating layers using the photoresist as a mask to expose portions of the drain electrode and the storage capacitor conductor and to leave a first portion of the second insulating layer under the second portion of the photoresist;

removing the second portion of the photoresist;

depositing a conductive film; and

removing the second portion of the photoresist to form a pixel electrode connected to the drain electrode and the storage capacitor conductor,

wherein the photo mask include a light blocking area, a transmitting area, and a translucent area, and

wherein the translucent area includes a plurality of light blocking portions having a plurality of areas at which amounts of light blocked are different from each other.

7. The method of claim 6, wherein the respective light blocking portions have a stripe shape.

8. The method of claim 7, wherein the respective areas of the light blocking portions have different vertical widths.

9. The method of claim 8, wherein the respective light blocking portions comprise:

a first area corresponding to a portion adjacent to where a near edge of the storage capacitor conductor is not formed;

a second area corresponding to an area near the edge of the storage capacitor conductor;

a third area corresponding to a portion of the storage capacitor conductor;

a fourth area corresponding to an area near an edge of an expansion of the gate line; and

a fifth area corresponding to a portion of the expansion of the gate line.

10. The method of claim 9, wherein the first area has the narrowest vertical width.

11. The method of claim 9, wherein the second portion of the photoresist film is positioned near the edge of the storage capacitor conductor.

12. The method of claim 6, wherein the photo mask varies an amount of light blocked by adjusting an interval between adjacent light blocking portions.

13. The method of claim 6, wherein the etching of the second and first insulating layers exposes portions of the data line.

14. The method of claim 6, wherein the etching of the second and first insulating layers exposes a portion of the gate line.

15. A photo mask comprising:

a transmitting area; and

a translucent area,

wherein the translucent area has a plurality of light blocking portions which have a predetermined size and are arranged in a matrix.

16. The photo mask of claim 15, wherein the light blocking portions have different sizes from each other.

17. The photo mask of claim 15, wherein the light blocking portions have the same size and have a different formation density in accordance with formation position.

18. The photo mask of claim 15, wherein the respective light blocking portions have a polygon shape.

19. The photo mask of claim 18, wherein the respective light blocking portions have a rectangular shape.

20. The photo mask of claim 18, wherein the respective light blocking portions have a triangular shape.

21. The photo mask of claim 18, wherein the respective light blocking portions have a lozenge shape.

22. The photo mask of claim 16, wherein the respective light blocking portions have a circular shape.

23. The photo mask of claim 16, wherein the respective light blocking portions have an elliptical shape.

24. The photo mask of claim 15, further comprising a light blocking area.

31. The method of claim 16, wherein the second portion of the photoresist is positioned near an edge of the storage capacitor conductor.

25. A method of manufacturing a thin film transistor array panel, the method comprising:

forming a gate line on a substrate;

forming a first insulating layer on the gate line;

forming a semiconductor layer on the first insulating layer;

forming a data line, a drain electrode, and a storage capacitor conductor on the semiconductor layer;

depositing a second insulating layer on the data line, the drain electrode, and the storage capacitor conductor;

forming a photoresist including a first portion and a second portion thinner than the first portion on the second insulating layer by exposing it to light through a photo mask and developing;

etching the second and first insulating layers using the photoresist as a mask to expose portions of the drain electrode and the storage capacitor conductor and to leave a first portion of the second insulating layer under the second portion of the photoresist;

removing the second portion of the photoresist;

depositing a conductive film; and

removing the second portion of the photoresist to form a pixel electrode connected to the drain electrode and the storage capacitor conductor,

wherein the photo mask include a light blocking area, a transmitting area, and a translucent area, and

wherein the translucent area has a plurality of light blocking portions which have a predetermined size and are arranged in a matrix.

26. The photo mask of claim 25, wherein the light blocking portions have different sizes from each other.

27. The photo mask of claim 25, wherein the light blocking portions have the same size and have different formation densities in accordance with formation position.

28. The photo mask of claim 25, wherein the respective light blocking portions have a polygon shape.

29. The photo mask of claim 28, wherein the respective light blocking portions have a rectangular shape.

30. The photo mask of claim 26, wherein the respective light blocking portions have a circular shape.

32. The method of claim 25, wherein the etching of the second and first insulating layers exposes portions of the data line and the drain electrode.

33. The method of claim 25, wherein the etching of the second and first insulating layers exposes a portion of the gate line.