Method for equalizing a digital signal through removal of data dependent jitter

• US 20060182205A1
• Filed: 02/16/2005
• Published: 08/17/2006
• Est. Priority Date: 02/16/2005
• Status: Active Grant

• Current Assignee: Keysight Technologies, Inc.
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Montijo, Allen, Draving, Steven D.
• Granted Patent: US 7,480,355 B2
• Time in Patent Office: Days
• US Class Current: 375/346
• CPC Class Codes: G11B 20/10009 Improvement or modification of read or write signals
• CPC Class Codes: G11B 20/10046 filtering or equalising, e.g. setting the tap weights of an FIR filter

Abstract

Equalized Acquisition Record are prepared from Original Acquisition Records reflecting Total Jitter and from an existing description of DDJ. Removal of timing DDJ alters the locations of edges associated with data events. Voltage DDJ adjusts the asserted voltage in the central portion of a Unit Interval. One technique for equalizing timing jitter variably interpolates along the existing Original Acquisition Record to discover plausible new voltage values to assign to existing sample locations along the time axis. Another technique construes the desired amount of correction for each data event as an impulse that is applied to a Finite Impulse Response Filter whose output is a Voltage Correction Waveform having a smoothed voltage excursion. Time variant voltage values output from the Finite Impulse Response Filter are collected into a Voltage Correction Waveform Record having entry times found in the Original Acquisition Record. An entry by entry addition of these two Records produces the Equalized Acquisition Record.

Claims

1. A method of removing data dependent jitter from a symbolic representation of a digital signal, the method comprising the steps of:

(a) digitizing a digital signal of interest to create a sequence of sampled values;

(b) processing the sampled values of Step (a) to form an Acquisition Record that is a symbolic representation of the time variant behavior of digital signal of interest;

(c) identifying, for each bit in the waveform of the digital signal of interest whose time variant behavior is represented in the Acquisition Record of Step (b), a respectively associated amount of data dependent jitter that is known to be associated with such each bit;

(d) modifying the Acquisition Record of Step (b) to remove from the symbolic representation of each bit therein the respectively associated amount of data dependent jitter identified in Step (c); and

(e) supplying to a using environment the modified Acquisition Record of Step (d).

2. A method as in claim 1 wherein the data dependent jitter is timing jitter and Step (d) further comprises the step of time shifted interpolation.

3. A method as in claim 2 wherein the step of time shifted interpolation further comprises the step of filtering the respectively associated amount of data dependent jitter of Step (c) to spread its effect over a selected transition portion of the such each bit with which the amount of data dependent jitter is associated.

4. A method as in claim 1 wherein the data dependent jitter is timing jitter and Step (d) further comprises the step of adding a compensatory waveform to the Acquisition Record of Step (b).

5. A method as in claim 4 wherein the step of adding a compensatory waveform further comprises the step of filtering the respectively associated amount of data dependent jitter of Step (c) to spread its effect over a selected transition portion of the such each bit with which the amount of data dependent jitter is associated.

6. A method as in claim 1 wherein the data dependent jitter is voltage jitter and Step (d) further comprises the step of adding a compensatory waveform to the Acquisition Record of Step (b).

7. A method as in claim 6 wherein the step of adding a compensatory waveform further comprises the step of filtering the respectively associated amount of data dependent jitter of Step (e) to spread its effect over a selected asserted portion of the such each bit with which the amount of data dependent jitter is associated.

8. A method as in claim 1 wherein Step (e) further comprising the step of applying the modified Acquisition Record to a Digital to Analog Converter to create an actual time variant voltage waveform.

9. A method of relocating in time by Δ

t the position of a waveform feature contained in a symbolic description of a waveform that is a sequence of sampled voltage values v_i equally spaced apart in time, the method comprising the steps of;

(a) for a selected number of consecutive sampled voltage values within which the waveform feature occurs;

(a1) selecting a sampled voltage value old_v_k whose associated position in time is old_t_k;

(a2) interpolating between sampled voltage values among the v_i to find new_v_k whose associated position in time new_t_k is Δ

t different from old_t_k;

(a3) replacing old_v_k with new_v_k to alter the symbolic description of the waveform;

(b) subsequent to Steps (a1-a3), using the altered description of the waveform in place of its original unaltered description.

10. A method as in claim 9 wherein Step (a2) includes the step of filtering Δ

t with a filter whose transfer function produces values filtered_Δ

t that are maximal at the location in time describing the center of the waveform feature to be relocated and minimal at locations in time on either side of that waveform feature, and wherein new_t_k is filtered_Δ

t different from old_t_k.

11. A method as in claim 10 wherein the filtering of Step (a2) is performed using a finite impulse response filter.

12. A method as in claim 9 wherein the waveform feature is a transition between logical values and Δ

t is data dependent timing jitter.

13. A method of relocating in time by Δ

t the position of a waveform feature contained in an original symbolic description of a waveform that is a sequence of sampled voltage values v_i equally spaced δ

t apart in time along a time axis, the method comprising the steps of;

(a) for a selected number of consecutive sampled voltage values within which the waveform feature occurs, filtering Δ

t with a filter whose transfer function produces a symbolic description of a compensatory time domain waveform of values filtered_Δ

v that are equally spaced δ

t apart in time along the time axis and coincident with the time values for the symbolic description of the waveform, maximal at the location in time describing the center of the waveform feature to be relocated and minimal at locations in time on either side of that waveform feature;

(b) subsequent to Step (a), adding each filtered_Δ

v in the symbolic description of the compensatory time domain waveform to a corresponding v_i in the original symbolic description of the waveform to produce an altered symbolic description.

14. A method as in claim 13 wherein the waveform feature is a transition between logical values and Δ

t is data dependent timing jitter.

15. A method of relocating in voltage by Δ

v the position of a waveform feature contained in an original symbolic description of a waveform that is a sequence of sampled voltage values v_i equally spaced δ

t apart in time along a time axis, the method comprising the steps of;

(a) for a selected number of consecutive sampled voltage values within which the waveform feature occurs, filtering Δ

v with a filter whose transfer function produces a symbolic description of a compensatory time domain waveform of values filtered_Δ

v that are equally spaced δ

t apart in time along the time axis and coincident with the time values for the symbolic description of the waveform, maximal at the location in time describing the center of the waveform feature to be relocated and minimal at locations in time on either side of that waveform feature;

(b) subsequent to Step (a), adding each filtered_Δ

v in the symbolic description of the compensatory time domain waveform to a corresponding v_i in the original symbolic description of the waveform to produce an altered symbolic description.

16. A method as in claim 15 wherein the waveform feature is an asserted region representing a logical value and Δ

v is data dependent voltage jitter.