Display methods and apparatus

• US 20060187191A1
• Filed: 01/06/2006
• Published: 08/24/2006
• Est. Priority Date: 02/23/2005
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Pixtronix, Incorporated (Qualcomm, Inc.)
• Inventors: Barton, Roger, Lewis, Stephen, Hagood, Nesbitt W., McAllister, Abraham
• Granted Patent: US 7,755,582 B2
• Time in Patent Office: Days
• US Class Current: 345/109
• CPC Class Codes: G02B 26/04 by periodically varying the intensity of light, e.g. using choppers shutters, diaphragms for cameras G03B9/00; devices for eliminating or reducing the effect of flicker in projection systems G03B21/40
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/088 using a non-linear two-terminal element
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/063 Waveforms for resetting the whole screen at once
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833

Abstract

The invention relates to methods and apparatus for forming images on a display utilizing a control matrix to control the movement of MEMs-based light modulators.

Claims

1. A display apparatus comprising:

an array of pixels including

a substrate having a plurality of apertures, and

a plurality of shutters corresponding to the plurality of apertures configured for transverse motion relative to the substrate; and

a control matrix connected to the substrate including, for a pixel in the array of pixels, i) a write-enabling interconnect for enabling the pixel to respond to a data voltage, ii) an actuation voltage interconnect for providing a voltage sufficient to actuate the pixel, iii) a first switch for selectively governing the application of the voltage provided by the actuation voltage interconnect to the pixel, and iv) a data voltage interconnect for controlling the first switch, thereby regulating the application of the actuation voltage across an actuator connected to a respective shutter and empowering transverse motion of the respective shutter corresponding to form an image on the display.

2. The display apparatus of claim 1, comprising:

an actuation voltage source for providing a voltage to the actuation voltage interconnect;

a data voltage source for providing a voltage to the data voltage interconnect, wherein the voltage provided by the actuation voltage source is greater than the voltage provided by the data voltage source.

3. The display apparatus of claim 2, wherein the actuation voltage source provides a voltage that at least about 4 times greater than the voltage provided by the data voltage source.

4. The display apparatus of claim 1, comprising, for the pixel, a second data voltage interconnect for controlling a second switch, wherein application of a predetermined voltage to the first data voltage interconnect empowers an opening of the corresponding shutter and the application of a predetermined voltage to the second data voltage interconnect empowers the closing of the shutter.

5. The display apparatus of claim 1, comprising an elastic member connected to at least one of the shutters to transversely move the shutter relative to the substrate in the absence of the application of the actuation voltage.

6. The display apparatus of claim 1, comprising, for the pixel, a memory element for storing an intended shutter position.

7. The display apparatus of claim 6, wherein the memory element stores a current intended position of the shutter.

8. The display apparatus of claim 6, wherein the memory element stores a subsequent intended position of the shutter.

9. The display apparatus of claim 6, wherein the memory element comprises a capacitor.

10. The display apparatus of claim 9, wherein the shutter moves transversely in response to a discharging of the capacitor.

11. The display apparatus of claim 6, wherein the memory element stores the data voltage applied to the data interconnect.

12. The display apparatus of claim 6, wherein the memory element comprises one of a SRAM and a DRAM circuit.

13. The display apparatus of claim 1, wherein a plurality of pixels in the array of pixels share a common actuation voltage interconnect.

14. The display apparatus of claim 1, wherein the pixel comprises a resistor positioned between the actuation voltage interconnect and the first switch.

15. The display apparatus of claim 1, wherein the first switch comprises a transistor.

16. The display apparatus of claim 1, wherein the first switch comprises varistor.

17. The display apparatus of claim 1, wherein the switch comprises a MIM diode.

18. The display apparatus of claim 1, wherein a plurality of pixels in the array of pixels are arranged to form a scan line, and wherein the pixels in the scan line share the write-enable interconnect.

19. The display apparatus of claim 1, wherein empowering comprising actuating the actuator.

20. The display apparatus of claim 1, wherein empowering comprises substantially reducing an additional minimum voltage change needed to actuate the actuator.

21. The display apparatus of claim 20, wherein the control matrix comprises a global actuation interconnect for causing at least the additional minimum voltage change to a plurality of pixels in the array of pixels.

22. The display apparatus of claim 1, comprising a global actuation interconnect for initiating actuation of the empowered actuators.

23. A display apparatus comprising:

an array of pixels including

a substrate having a plurality of apertures, and

a plurality of shutters corresponding to the plurality of apertures;

wherein a shutter has at least one mechanical support substantially limiting a range of motion of the shutter to a movement plane that is parallel to a plane defined by the substrate; and

a control matrix disposed on the substrate including, for a pixel in the array of pixels, i) a write-enabling interconnect for enabling the pixel to respond to a data voltage, ii) an actuation voltage interconnect for providing a voltage sufficient to actuate the pixel, iii) a first switch for selectively governing the application of the voltage provided by the actuation voltage interconnect to the pixel, and iv) a data voltage interconnect for controlling the first switch, thereby regulating the application of the actuation voltage across an actuator connected to a respective shutter and empowering an electrostatically driven movement of the respective shutter substantially within the movement plane.

24. A method of forming an image on a display comprising:

applying a write-enabling voltage to a plurality of pixels arranged in a scan line;

applying an actuation voltage to at least one of the pixels in the scan line;

selectively applying a data voltage to a switch corresponding to a pixel in the scan line to regulate the application of the actuation voltage to an actuator in the pixel, thereby controlling the position of a shutter connected to the actuator that corresponds to the switch, wherein the actuation voltage is at least twice the data voltage, and wherein the shutter is configured for transverse movement adjacent a substrate.

25. The method of claim 24, wherein the actuation voltage is at least about 4 times greater than the data voltage.

26. The method of claim 24, comprising grounding the actuator, thereby allowing an elastic restoring force to drive the shutter transversely into a rest position.

27. The method of claim 24, comprising storing an intended position of the shutter at the pixel.

28. The method of claim 27, wherein storing the intended shutter position comprises charging a capacitor.

29. The method of claim 27, wherein storing the intended shutter position comprises discharging a capacitor.

30. The method of claim 27, wherein storing the intended shutter position comprises storing the shutter position in one of a SRAM circuit and a DRAM circuit incorporated into the pixel.

31. The method of claim 27, wherein the memory element stores a subsequent intended position of the shutter.

32. The method of claim 27, wherein storing the intended position comprises storing the data voltage applied to the switch.

33. The method of claim 24, comprising applying a global actuation voltage to a plurality of pixels in the array of pixels.