WIREBOND CRACK SENSOR FOR LOW-K DIE

• US 20060189007A1
• Filed: 02/23/2005
• Published: 08/24/2006
• Est. Priority Date: 02/23/2005
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Sauter, Wolfgang, Burrell, Lloyd G., Aoki, Toyohiro
• Granted Patent: US 7,250,311 B2
• Time in Patent Office: Days
• US Class Current: 438/14
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05093 of a plurality of vias
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 24/02 Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01327 Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A sensor for measuring cracks in a semiconductor device, such as a wafer and, more particularly, to a BEOL wirebond crack sensor for low-k dies or wafers, and a method of providing the wirebond crack sensor for low-k wafers or the like structures.

Claims

1. A sensor structure for measuring damage encountered by a semiconductor device, wherein said sensor structure comprises:

at least one wirebond sensor including circuitry for determining damage in a low-k die, wafer or pad, said circuitry wirebonding serpentine and comb-like wiring in a dielectric substrate.

2. A sensor structure as claimed in claim 1, wherein said at least one wirebond sensor comprises a BEOL wiring arrangement.

3. A sensor structure as claimed in claim 1, wherein said sensor structure is located under a pad or wafer of said semiconductor device so as to detect cracks encountered by said pad or wafer responsive to wirebonding and wire pull tests.

4. A sensor structure as claimed in claim 3, wherein said sensor structure is located at a top wiring level arranged under a wirebond or wafer.

5. A sensor structure as claimed in claim 2, wherein said BEOL wiring arrangement comprises an array of serpentine and comb-like wring located at minimum spacings so as to check for continuity in the wiring circuits of semiconductor devices employing chips formed from said die, wafer or pad, and for detecting leakage current indicative of damage dielectric components.

6. A sensor structure as claimed in claim 5, wherein said at least one wirebond sensor detects damage in the nature of BEOL (back-end-of-line) wiring and dielectric cracking and delamination of layers in a multilevel semiconductor device.

7. A sensor structure as claimed in claim 3, wherein said structure comprises a stitch serpentine and comb wiring array for at least two levels of a semiconductor device connected by vias.

8. A sensor structure as claimed in claim 7, wherein said structure represents a via chain in low-k levels for checking the integrity of laminations in the layers of said semiconductor device.

9. A sensor structure as claimed in claim 8, wherein a plurality of via chains interconnect said serpentine and comb wires of a plurality of sensors in at least two levels to provide a continuity test for the via chains in low-k dielectric materials.

10. A method of providing a sensor structure for measuring damage encountered by a semiconductor device, wherein said method comprises:

providing at least one wirebond sensor including circuitry for determining damage in a low-k die, wafer or pad, said circuitry wirebonding serpentine and comb-like wiring in a dielectric substrate.

11. A method as claimed in claim 10, wherein said at least one wirebond sensor comprises a BEOL wiring arrangement.

12. A method as claimed in claim 10, wherein said sensor structure is located under a pad or wafer of said semiconductor device so as to detect cracks encountered by said pad or wafer responsive to wirebonding and wire pull tests.

13. A method as claimed in claim 12, wherein said sensor structure is located at a top wiring level arranged under a wirebond or wafer.

14. A method as claimed in claim 11, wherein said BEOL wiring arrangement comprises an array of serpentine and comb-like wring located at minimum spacings so as to check for continuity in the wiring circuits of semiconductor devices employing chips formed from said die, wafer or pad, and for detecting leakage current indicative of damage dielectric components.

15. A method as claimed in claim 14, wherein said at least one wirebond sensor detects damage in the nature of BEOL (back-end-of-line) wiring and dielectric cracking and delamination of layers in a multilevel semiconductor device.

16. A method as claimed in claim 12, wherein said structure comprises a stitch serpentine and comb wiring array for at least two levels of a semiconductor device connected by vias.

17. A method as claimed in claim 16, wherein said structure represents a via chain in low-k levels for checking the integrity of laminations in the layers of said semiconductor device.

18. A method as claimed in claim 17, wherein a plurality of via chains interconnect said serpentine and comb wires of a plurality of sensors in at least two levels to provide a continuity test for the via chains in low-k dielectric materials.