Image sensor having boosted reset

• US 20060192872A1
• Filed: 04/06/2006
• Published: 08/31/2006
• Est. Priority Date: 07/26/2000
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Xue, Song
• Granted Patent: US 7,233,353 B2
• Time in Patent Office: Days
• US Class Current: 348/294
• CPC Class Codes: H03K 19/01707 in asynchronous circuits
• CPC Class Codes: H03K 19/01714 by bootstrapping, i.e. by positive feed-back
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/709 Circuitry for control of the power supply
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals

Abstract

A power supply reset boosting element which boosts a level of the reset voltage to a level higher than the level of the power supply. The boosted voltage is isolated from both the power supply and from undesired switching by special transistors which can withstand the voltage power supply level.

Claims

1-14. -14. (canceled)

15. An image sensor, comprising:

a photosensitive region;

a voltage boosting circuit for producing a boosted reset voltage on a reset line at a level higher than a power supply output voltage level, said voltage boosting circuit comprising a first capacitor, a precharge circuit for precharging said first capacitor and an isolating circuit for isolating said capacitor, said isolating circuit is not forward biased by a voltage that is greater than the power supply voltage, wherein a charge on said first capacitor is used as said boosted reset voltage; and

a voltage protection circuit, said voltage protection circuit being connected to said reset line and protecting at least one transistor against being forward biased by said boosted reset voltage.

16. The image sensor according to claim 15, wherein said voltage protection circuit further comprises at least one additional transistor of a type which can not be forward biased by said boosted reset voltage.

17. The image sensor according to claim 15, wherein said isolating circuit comprises first and second series connected switching transistors.

18. The image sensor according to claim 15 further comprising a second capacitor, wherein a charge on said second capacitor is used as a second boosted output.

19. The image sensor according to claim 15 further comprising a row driver circuit, which uses a first line as a row select, and a second line, intended for row select of a different row than a currently selected row, for a reset line.

20. The image sensor according to claim 15, wherein said precharge circuit comprises a switching transistor.

21. The image sensor according to claim 15, wherein said boosting circuit further comprises a series of inverters used to generate control signals for said boosting circuit.

22. An image sensor comprising:

a photosensitive region; and

a voltage boosting circuit for producing a first boosted voltage on a first line and a second boosted voltage on a second line, said first voltage being at a first level higher than a power supply output voltage level, said second voltage being at a second level higher than the power supply output voltage level, said voltage boosting circuit comprising;

a first capacitor,

s second capacitor,

a precharge circuit for precharging said first and second capacitors, and

an isolating circuit for isolating said capacitors during operation of said boosting circuit, said isolating circuit is not forward biased by a voltage that is greater than the power supply voltage, wherein a charge on said first capacitor is used as said first boosted voltage and a charge on said second capacitor is used as said second boosted voltage.

23. The image sensor according to claim 22, further comprising a voltage protection circuit, said voltage protection circuit being connected to at least said first line to protect at least one transistor against being forward biased by said first boosted voltage.

24. The image sensor according to claim 23, wherein said voltage protection circuit is also connected to said second line to protect at least another transistor against being forward biased by said second boosted voltage.

25. The image sensor according to claim 22, wherein said first line is a reset line and said first boosted voltage is a boosted reset voltage.

26. The image sensor according to claim 22, wherein said first line is a reset line, said first boosted voltage is a boosted reset voltage, said second line is a reset well line and said second boosted voltage is a boosted reset well voltage.

27. The image sensor according to claim 22, wherein said boosting circuit further comprises a series of inverters used to generate control signals for said boosting circuit.

28. An image sensor, comprising:

a voltage boosting circuit for producing a first boosted voltage on a first line, said first boosted voltage having a level higher than a power supply output voltage level, said voltage boosting circuit comprising;

a first capacitor,

a precharge circuit for precharging said first capacitor, and

an isolating circuit for isolating said capacitor, said isolating circuit is not forward biased by a voltage that is greater than the power supply voltage, wherein a charge on said first capacitor is used as said first boosted voltage; and

a voltage protection circuit, said voltage protection circuit being connected to said first line and protecting at least one transistor against being forward biased by said first boosted voltage.

29. The image sensor of claim 28 further comprising a second capacitor, wherein a charge on said second capacitor is used as a second boosted voltage.