Managing memory health
First Claim
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1. A method for managing the health of memory in a computing system, the method being performable by a logic with bus master capability in the computing system, the logic being configured to selectively operate independently of an operating system and a processor associated with the computing system, the method comprising:
- accessing a memory map associated with the computing system;
selectively checking a memory location identified in the memory map for a correctable single bit memory error;
upon detecting a correctable single bit error, selectively causing a corrected data to be written back to the memory location; and
upon determining that a likelihood that the memory location will experience a memory failure exceeds a threshold, selectively causing data stored in the memory location to be relocated and to make the memory location logically inaccessible to the computing system.
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Abstract
Systems, methodologies, media, and other embodiments associated with managing memory health are described. One exemplary system embodiment includes logic for detecting and correcting single bit memory errors. The example system may also include logic for selectively making unavailable a memory location associated with single bit memory errors.
118 Citations
25 Claims
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1. A method for managing the health of memory in a computing system, the method being performable by a logic with bus master capability in the computing system, the logic being configured to selectively operate independently of an operating system and a processor associated with the computing system, the method comprising:
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accessing a memory map associated with the computing system;
selectively checking a memory location identified in the memory map for a correctable single bit memory error;
upon detecting a correctable single bit error, selectively causing a corrected data to be written back to the memory location; and
upon determining that a likelihood that the memory location will experience a memory failure exceeds a threshold, selectively causing data stored in the memory location to be relocated and to make the memory location logically inaccessible to the computing system. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method for managing the health of memory in a computing system, the method being performable by a logic with bus master capability in the computing system, the logic being configured to selectively operate independently of an operating system and a processor associated with the computing system, the method comprising:
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accessing a memory map associated with the computing system;
selectively checking a memory location identified in the memory map for a correctable single bit memory error, where checking the memory location for a correctable single bit memory error includes one or more of, analyzing a parity bit, analyzing an error correcting code (ECC) bit, and performing a memory read with ECC bit validation, the checking being performed one or more of, periodically, constantly, substantially constantly, according to a configurable schedule, and in response to a user command;
upon detecting a correctable single bit error, selectively causing a corrected data to be written back to the memory location;
upon determining that a likelihood that the memory location will experience a memory failure exceeds a threshold, selectively causing data stored in the memory location to be relocated and to make the memory location logically inaccessible to the computing system, where the threshold concerns one or more of, a number of errors experienced by the memory location, a number of errors experienced by a chip on which the memory location is implemented, an error frequency, and a change in the error frequency;
selectively manipulating a non-volatile memory location to record the detecting of the correctable single bit error; and
notifying the operating system concerning the detecting of the correctable single bit error.
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16. A computer-readable medium storing processor executable instructions operable to perform a method for managing the health of memory in a computing system, the method being performable by a logic with bus master capability in the computing system, the logic being configured to selectively operate independently of an operating system and a processor associated with the computing system, the method comprising:
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accessing a memory map associated with the computing system;
selectively checking a memory location identified in the memory map for a correctable single bit memory error;
upon detecting a correctable single bit error, selectively causing a corrected data to be written back to the memory location; and
upon determining that a likelihood that the memory location will experience a memory failure exceeds a threshold, selectively causing data stored in the memory location to be relocated and to make the memory location logically inaccessible to the computing system.
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17. An apparatus, comprising:
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a first logic operably connectable to a computing system, the first logic being configured with bus master capability in the computing system, to detect and scrub correctable single bit errors in a memory location identified in a memory map associated with the computing system, and to operate independently of an operating system and a processor associated with the computing system; and
a second logic operably connectable to the operating system, the second logic being configured to identify a first memory location in the computing system that exceeds a threshold associated with correctable single bit errors and, upon identifying the first memory location, to selectively relocate data located in the first memory location to a second memory location in the computing system and to selectively logically remove the first memory location from the computing system. - View Dependent Claims (18, 19, 20, 21, 22)
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23. An apparatus, comprising:
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means for detecting a correctable single bit memory error in a computing system;
means for correcting the correctable single bit memory error; and
means for selectively making unavailable a memory location associated with the correctable single bit memory error.
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24. A set of application programming interfaces embodied on a computer-readable medium for execution by a computer component in conjunction with managing memory health, comprising:
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a first interface for communicating data concerning a detected correctable single bit memory error;
a second interface for communicating data concerning a corrected correctable single bit memory error; and
a third interface for communicating data concerning selectively making unavailable a memory location associated with the correctable single bit memory error.
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25. A method, comprising:
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booting a computing system;
constructing a physical memory map for the computing system;
loading an operating system into physical memory in the computing system based, at least in part, on the physical memory map;
receiving an identification of an affected memory location that is predicted to experience a memory failure, the identification being received from a logic that is not part of a processor in the computing system, the logic being configured with bus master capability in the computing system;
determining a range of physical memory addresses associated with the affected memory location;
allocating a set of memory locations to receive data stored in the range of physical memory addresses associated with the affected memory location;
relocating data from the range of physical memory addresses associated with the affected memory location to the set of memory locations;
remapping the range of physical memory addresses to the set of memory locations; and
making a relocation data available to the ROM BIOS to facilitate excluding the range of physical memory addresses from the physical memory map on a subsequent system boot.
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Specification