Structure and method for forming laterally extending dielectric layer in a trench-gate FET
First Claim
1. A method of forming a FET, comprising:
- forming a trench in a silicon region;
forming a silicon nitride layer over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom;
forming a layer of low temperature oxide (LTO) over the silicon nitride layer such that the LTO layer is thicker along the surface of the silicon region adjacent the trench than along the trench bottom; and
uniformly etching back the LTO layer such that a portion of the silicon nitride layer extending along the trench bottom and along at least a portion of the trench sidewalls becomes exposed while portions of the silicon nitride layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the LTO layer.
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Accused Products
Abstract
A field effect transistor (FET) is formed as follows. A trench is formed in a silicon region. An oxidation barrier layer is formed over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom. A protective layer is formed over the oxidation barrier layer inside and outside the trench. The protective layer is partially removed such that a portion of the oxidation barrier layer extending at least along the trench bottom becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer.
63 Citations
23 Claims
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1. A method of forming a FET, comprising:
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forming a trench in a silicon region;
forming a silicon nitride layer over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom;
forming a layer of low temperature oxide (LTO) over the silicon nitride layer such that the LTO layer is thicker along the surface of the silicon region adjacent the trench than along the trench bottom; and
uniformly etching back the LTO layer such that a portion of the silicon nitride layer extending along the trench bottom and along at least a portion of the trench sidewalls becomes exposed while portions of the silicon nitride layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the LTO layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of forming a FET, comprising:
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forming a trench in a silicon region;
forming an oxidation barrier layer over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom;
forming a protective layer over the oxidation barrier layer inside and outside the trench; and
partially removing the protective layer such that a portion of the oxidation barrier layer extending at least along the trench bottom becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. An intermediary of a FET, comprising:
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a trench extending into a silicon region;
an oxidation barrier layer extending over a surface of the silicon region adjacent the trench and along the trench sidewalls but being discontinuous along the trench bottom; and
a protective layer extending over all horizontally extending portions of the oxidation barrier layer. - View Dependent Claims (20, 21, 22)
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23-44. -44. (canceled)
Specification