Connection Structure Semiconductor Chip and Electronic Component Including the Connection Structure and Methods for Producing the Connection Structure

• US 20070025684A1
• Filed: 07/26/2006
• Published: 02/01/2007
• Est. Priority Date: 07/28/2005
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Otremba, Ralf
• Granted Patent: US 8,084,861 B2
• Time in Patent Office: Days
• US Class Current: 385/147
• CPC Class Codes: H01L 2224/04026 Bonding areas specifically adapted for layer connectors
• CPC Class Codes: H01L 2224/29101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/29109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/29144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/29147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/32507 comprising an intermetallic compound
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48464 the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/8381 involving forming an intermetallic compound at the bonding interface
• CPC Class Codes: H01L 2224/83825 Solid-liquid interdiffusion
• CPC Class Codes: H01L 23/49513 having bonding material between chip and die pad
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12032 : Schottky diode
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

Connection structure (5) for attaching a semiconductor chip (2) to a metal substrate (4) is provided which has a plurality of electrically conducting layers (11, 12, 13, 14) arranged in a stack. The stack has a contact layer (11) for providing an ohmic contact to a semiconductor chip (2), at least one mechanical decoupling layer (12) for mechanically decoupling the semiconductor chip (2) and the metal substrate (4), at least one diffusion barrier layer (13) and a diffusion solder layer (14) for providing a diffusion soldered mechanical bond and an electrical connection to a metal substrate (4). The mechanical decoupling layer (12) is positioned in the stack between the diffusion barrier layer (13) and the contact layer (11).

Claims

1. A connection structure for attaching a semiconductor chip to a metal substrate, comprising a plurality of electrically conducting layers arranged in a stack, the stack comprising:

a contact layer for providing an ohmic contact to a semiconductor chip;

at least one mechanical decoupling layer for mechanically decoupling the semiconductor chip and the substrate;

at least one diffusion barrier layer for preventing diffusion between the mechanical decoupling layer and an adjacent layer;

a diffusion solder layer for providing a diffusion soldered mechanical bond and an electrical connection to a metal substrate;

wherein the mechanical decoupling layer is positioned in the stack between the diffusion barrier layer and the contact layer.

2. A connection structure according to claim 1, wherein

the mechanical decoupling layer is in direct contact with the diffusion barrier layer and with the contact layer.

3. A connection structure according to claim 1, wherein

the stack includes two diffusion barrier layers and the mechanical decoupling layer is positioned between and is in direct contact with the two diffusion barrier layers.

4. A connection structure according to claim 1, wherein

the contact layer comprises Ti or Ni or Au or Pt or Cu or Pd, the mechanical decoupling layer consists essentially of Al or Ag and the barrier layer comprises Ti or Ti and TiN.

5. A connection structure according to claim 1, wherein

the diffusion solder layer consists essentially of a diffusion solder material which forms intermetallic phases with the material of the metal substrate at a temperature of approximately 230°

C. to approximately 280°

C.

6. A connection structure according to claim 5, wherein

the diffusion solder layer comprises AuSn or AgSn or InSn or CuSn.

7. A connection structure according to claim 1, wherein

the contact layer has a thickness of less than 1 μ

m, the mechanical decoupling layer has a thickness of 0.1 μ

m to 10 μ

m, the diffusion barrier layer has a thickness of less than 0.1 μ

m and the diffusion solder layer has a thickness of less than 10 μ

m.

8. A semiconductor chip, wherein a connection structure according to claim 1 is disposed on its rear side and wherein the contact layer is disposed on the rear side of the semiconductor chip.

9. A semiconductor chip according to claim 8, wherein

the semiconductor chip comprises a vertical power device, the vertical power device being one of the group consisting of an IGBT, a MOSFET, a Schottkey-Diode and a PIN-Diode.

18. A method for mounting a semiconductor chip on a metal substrate, comprising

providing a semiconductor chip with the interconnection structure according to claim 1;

providing a metal substrate;

placing the semiconductor chip on the metal substrate, and

performing a heat treatment to diffusion solder bond the semiconductor chip to the meal substrate.

19. A method for mounting a semiconductor chip according to claim 18, wherein

the heat treatment is carried out at a temperature of between approximately 230°

C. to approximately 280°

C. and intermetallic phases are formed at the interface between the diffusion solder layer and the metal substrate.

10. An electronic component comprising:

a semiconductor chip comprising a connection structure comprising a plurality of electrically conducting layers arranged in a stack, the stack comprising;

a contact layer for providing an ohmic contact to a semiconductor chip;

at least one mechanical decoupling layer for mechanically decoupling the semiconductor chip and the substrate;

at least one diffusion barrier layer for preventing diffusion between the mechanical decoupling layer and an adjacent layer;

a diffusion solder layer for providing a diffusion soldered mechanical bond and an electrical connection to a metal substrate;

wherein the mechanical decoupling layer is positioned in the stack between the diffusion barrier layer and the contact layer, and

a metal substrate,

wherein the semiconductor chip is attached to the metal substrate by the connection structure and wherein the interface between the diffusion solder layer and the metal substrate comprises intermetallic phases.

11. An electronic component according to claim 10, wherein

the metal substrate comprises copper or a copper alloy.

12. An electronic component according to claim 10, wherein

the metal substrate is a die pad of a leadframe.

13. A method for producing a connection structure for attaching a semiconductor chip to a metal substrate, the connection structure comprising a plurality of electrically conductive layers arranged in a stack, the method comprising:

depositing a contact layer for providing an ohmic contact to a semiconductor chip;

depositing a mechanical decoupling layer for mechanically decoupling the semiconductor chip and the metal substrate;

depositing a diffusion barrier layer for preventing diffusion between the mechanical decoupling layer and an adjacent layer;

depositing a diffusion solder layer for providing a diffusion soldered mechanical bond and an electrical connection to a metal substrate;

wherein the mechanical decoupling layer is positioned in the stack between the diffusion barrier layer and the contact layer.

14. A method for producing a connection structure according to claim 13, wherein

the mechanical decoupling layer is deposited on the contact layer, the diffusion barrier layer is deposited on the mechanical decoupling layer and the diffusion solder layer is deposited on the diffusion barrier layer.

15. A method for producing a connection structure according to claim 13, wherein

a first diffusion barrier layer is deposited on the contact layer, the mechanical decoupling layer is deposited on the first diffusion layer, a second diffusion barrier layer is deposited on the mechanical decoupling layer and the diffusion solder layer is deposited on the second diffusion barrier layer.

16. A method for producing a connection structure according to claim 13, wherein

the contact layer, the mechanical decoupling layer, the diffusion barrier layer and the diffusion solder layer of the interconnection structure are deposited by thermal evaporation, e-beam evaporation, dc sputtering, rf sputtering.

17. A method for producing a connection structure according to claim 13, wherein

the contact layer has a thickness of less than 1 μ

m, the mechanical decoupling layer has a thickness of 0.1 μ

m to 10 μ

m, the diffusion barrier layer has a thickness of less than 0.1 μ

m and the diffusion solder layer has a thickness of less than 10