Memory Reduction in Digital Broadcast Receivers

• US 20070064821A1
• Filed: 04/22/2006
• Published: 03/22/2007
• Est. Priority Date: 04/25/2005
• Status: Active Grant

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: SIRF Technology Incorporated (Qualcomm, Inc.)
• Inventors: Chen, Steven, Luu, Howard
• Granted Patent: US 7,664,187 B2
• Time in Patent Office: Days
• US Class Current: 375/260
• CPC Class Codes: H04L 27/265 Fourier transform demodulators, e.g. fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators H04L27/26524 takes precedence
• CPC Class Codes: H04L 27/2651 Modification of fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators for performance improvement

Abstract

An input random access memory (RAM) module of a fast Fourier transform (FFT) engine of a DVB receiver is used to store, during a first time period, delayed versions of an input signal that includes a first orthogonal frequency division multiplexed (OFDM) symbol and a cyclic prefix therefor received at the receiver, and samples for a second OFDM symbol to be demodulated using the FFT engine during a second time period. Delayed versions of the input signal are stored in the input RAM module of the FFT engine in a first-in-first-out (FIFO) fashion for signal acquisition and for FFT processing. Similarly, an output RAM module of the FFT engine is used to store moving averages of an autocorrelation of the input signal with its cyclic prefix computed over presumed guard intervals and over multiple symbols.

Claims

1. A method, comprising sharing an input random access memory (RAM) module of a fast Fourier transform (FFT) engine of a receiver so as to store, during a first time period, delayed versions of an input signal including a first orthogonal frequency division multiplexed (OFDM) symbol and a cyclic prefix therefor received at the receiver, and samples for a second OFDM symbol to be demodulated using the FFT engine during a second time period.

2. The method of claim 1, wherein the delayed versions of the input signal are stored in the input RAM module of the FFT engine in a first-in-first-out (FIFO) fashion.

3. The method of claim 1, further comprising storing, in an output RAM module of the FFT engine, moving window averages of an autocorrelation of the input signal computed over one or more presumed guard intervals thereof.

4. The method of claim 3, further comprising storing, in the output RAM modules of the FFT engine, recursive integration over multiple symbols of the moving window averages of the input signal computed over the one or more presumed guard intervals.

5. The method of claim 1, further comprising storing intermediate signal processing results obtained during acquisition of the input signal in an output RAM module of the FFT engine.

6. The method of claim 5, further comprising storing, in the output RAM of the FFT engine, an FFT of the input signal computed by the FFT engine.

7. The method of claim 1, wherein the input signal has a duration comprising a total period and the cyclic prefix has a duration comprising a guard interval, the method further comprising determining the guard interval.

8. The method of claim 7, wherein determining the guard interval comprises, for each of a plurality of possible guard intervals:

selecting one of the plurality of possible guard intervals;

delaying the input signal by a difference between the total period and a corresponding selected guard interval;

storing the delayed signal in the input RAM module;

calculating a moving window average of an autocorrelation for the delayed signal over the selected guard interval;

storing the moving window average in an output RAM module of the FFT engine;

storing the recursive integration of the moving window average in an output RAM module of the FFT engine;

determining a first recursively integrated moving window average from a plurality of stored recursively integrated moving window averages; and

determining the guard interval based on the first recursively integrated moving window average.

9. A receiver, comprising an input random access memory (RAM) coupled to a signal acquisition module of the receiver so as to store, during a first time period, delayed versions of an input signal including a first orthogonal frequency division multiplexed (OFDM) symbol and a cyclic prefix therefor received at the receiver, and samples for a second OFDM symbol to be demodulated using a fast Fourier transform (FFT) engine of the receiver during a second time period.

10. The receiver of claim 9, further comprising an output RAM coupled to the FFT engine so as to store moving window averages of an autocorrelation of the input signal computed over one or more presumed guard intervals thereof.

11. The receiver of claim 10, wherein the output RAM is further coupled to the FFT engine so as to store recursive integration results of the moving window averages of the input signal computed over the one or more presumed guard intervals.

12. The receiver of claim 9, further comprising an output RAM coupled to the FFT engine so as to store intermediate signal processing results obtained during acquisition of the input signal at the receiver.

13. The receiver of claim 12, wherein the output RAM is further coupled to the FFT engine so as to store an FFT of the input signal computed by the FFT engine.