Data processing apparatus

• US 20070093992A1
• Filed: 09/26/2006
• Published: 04/26/2007
• Est. Priority Date: 09/29/2005
• Status: Abandoned Application

• Current Assignee: Yokogawa Electric Corporation
• Original Assignee: Yokogawa Electric Corporation
• Inventors: Yoshino, Yasuhiro
• Application Number:
  US11/526,644
• Publication Number:
  US 20070093992A1
• Time in Patent Office: Days
• US Class Current: 702/199
• CPC Class Codes: G06F 17/18 for evaluating statistical data , e.g. average values, frequency distributions, probability functions, regression analysis forecasting specially adapted for a specific administrative, business or logistic context G06Q10/04

Abstract

A data processing apparatus, includes: a first storage unit which comprises a plurality of memory blocks separated corresponding to predetermined number of data and sequentially stores a plurality of time series measurement data; a block operation unit which performs an operation for the measurement data stored in the memory blocks of the first storage unit for each memory block to calculate block operation values; a second storage unit which stores the block operation values calculated by the block operation unit; and a moving average calculation unit which calculates a moving average of the measurement data based on the block operation values stored in the second storage unit.

Claims

1. A data processing apparatus, comprising:

a first storage unit which comprises a plurality of memory blocks separated corresponding to predetermined number of data and sequentially stores a plurality of time series measurement data;

a block operation unit which performs an operation for the measurement data stored in the memory blocks of the first storage unit for each memory block to calculate block operation values;

a second storage unit which stores the block operation values calculated by the block operation unit; and

a moving average calculation unit which calculates a moving average of the measurement data based on the block operation values stored in the second storage unit.

2. The data processing apparatus as claimed in claim 1, wherein

the first storage unit is DRAM, and the second storage unit is SRAM.

3. The data processing apparatus as claimed in claim 1, wherein

each of the block operation values is a block sum of the measurement data stored in each of the memory blocks.

4. The data processing apparatus as claimed in claim 1, wherein

each of the block operation values is a block average of the measurement data stored in each of the memory blocks.

5. The data processing apparatus as claimed in claim 4, further comprising:

a controller which transfers and stores the block averages stored in the second storage unit into the first storage unit after a power supply recovers.

6. The data processing apparatus as claimed in claim 2, wherein

each of the block operation values is a block sum of the measurement data stored in each of the memory blocks.

7. The data processing apparatus as claimed in claim 2, wherein

each of the block operation values is a block average of the measurement data stored in each of the memory blocks.

8. The data processing apparatus as claimed in claim 7, further comprising:

a controller which transfers and stores the block averages stored in the second storage unit into the first storage unit after a power supply recovers.