Non-volatile semiconductor device and method of fabricating embedded non-volatile semiconductor memory device with sidewall gate
First Claim
Patent Images
1. A non-volatile semiconductor device comprising:
- a first gate electrode structure comprising a first gate dielectric film and at least one kind of a first gate electrode material, in a first area above a semiconductor substrate;
a second gate electrode structure comprising a second gate dielectric film and a second gate electrode material as a side wall structure relative to the first gate electrode structure; and
a third gate electrode structure comprising the first gate dielectric material and the first gate electrode material in a second area not overlapping the first area;
wherein the height of the third gate electrode structure is lower than the height of the second gate electrode structure.
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Abstract
A method of manufacturing a non-volatile semiconductor memory device is provided which overcomes a problem of penetration of implanted ions due to the difference of an optimal gate height in simultaneous formation of a self-align split gate type memory cell utilizing a side wall structure and a scaled MOS transistor. A select gate electrode to form a side wall in a memory area is formed to be higher than that of the gate electrode in a logic area so that the height of the side wall gate electrode of the self-align split gate memory cell is greater than that of the gate electrode in the logic area. Height reduction for the gate electrode is performed in the logic area before gate electrode formation.
44 Citations
13 Claims
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1. A non-volatile semiconductor device comprising:
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a first gate electrode structure comprising a first gate dielectric film and at least one kind of a first gate electrode material, in a first area above a semiconductor substrate;
a second gate electrode structure comprising a second gate dielectric film and a second gate electrode material as a side wall structure relative to the first gate electrode structure; and
a third gate electrode structure comprising the first gate dielectric material and the first gate electrode material in a second area not overlapping the first area;
wherein the height of the third gate electrode structure is lower than the height of the second gate electrode structure.
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2. A method of manufacturing a non-volatile semiconductor device, comprising the steps of:
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forming a first gate electrode film comprising at least one kind of material successively to a first gate dielectric film above a semiconductor substrate;
fabricating the first gate electrode film to form a first gate electrode structure;
forming a second gate electrode structure having a second gate dielectric film and a second gate electrode film on one sidewall of the first gate electrode structure;
controlling the film thickness of an electrode so as to decrease the thickness of the first gate electrode film by a predetermined amount in a second area not overlapping a first area forming the first and second gate structures after the step of forming the first gate electrode film; and
forming a third gate structure by fabricating the gate electrode film subjected to the control for the thickness of the electrode. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification
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Current AssigneeRenesas Electronics Corporation
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Original AssigneeRenesas Technology Corporation (Renesas Electronics Corporation)
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InventorsYasui, Kan, Hisamoto, Digh, Ishimaru, Tetsuya, Kimura, Shin-ichiro
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current257/314
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CPC Class CodesG11C 16/0425 comprising cells containing...H01L 29/42344 with at least one additiona...H10B 43/10 characterised by the top-vi...H10B 43/30 characterised by the memory...H10B 69/00 Erasable-and-programmable R...
