Universal logic gate utilizing nanotechnology

• US 20070176643A1
• Filed: 06/08/2006
• Published: 08/02/2007
• Est. Priority Date: 06/17/2005
• Status: Active Grant

• Current Assignee: Knowm Tech LLC
• Original Assignee: Knowm Tech LLC
• Inventors: Nugent, Alex
• Granted Patent: US 7,420,396 B2
• Time in Patent Office: Days
• US Class Current: 326/104
• CPC Class Codes: H01L 27/101 including resistors or capacitors only
• CPC Class Codes: H03K 19/02 using specified components H03K19/0005 - H03K19/0021, H03K19/003 - H03K19/0175 take precedence
• CPC Class Codes: Y10S 977/94 in a logic circuit

Abstract

A universal logic gate apparatus is disclosed, which include a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein the plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create A plasticity mechanism is also provided, which is based on a plasticity rule for creating stable connections from the plurality of self-assembling chains of nanoparticles for use with the universal, reconfigurable logic gate. The plasticity mechanism can be based, for example, on a 2-dimensional binary input data stream, depending upon design considerations. A circuit is also associated with the plurality of self-assembling chains of nanoparticles, wherein the circuit provides a logic bypass that implements a flip-cycle for second-level logic. Additionally, an extractor logic gate is associated with the plurality of self-assembling chains of nanoparticles, wherein the extractor logic gate provides logic functionalities.

Claims

1. A universal logic gate apparatus, comprising:

a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein said plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create a universal, reconfigurable logic gate thereof.

2. The apparatus of claim 1 further comprising a plasticity mechanism based on a plasticity rule for creating stable connections from said plurality of self-assembling chains of nanoparticles for use with said universal, reconfigurable logic gate.

3. The apparatus of claim 2 wherein said plasticity mechanism is based on an input data stream.

4. The apparatus of claim 2 wherein said plasticity mechanism is based on a 2-dimensional binary input data stream.

5. The apparatus of claim 1 further comprising a circuit associated with said plurality of self-assembling chains of nanoparticles, wherein said circuit provides a logic bypass that implements a flip-cycle for second-level logic.

6. The apparatus of claim 1 further comprising at least one extractor logic gate associated with said plurality of self-assembling chains of nanoparticles, wherein said at least one extractor logic gate provides logic functionalities.

7. A universal logic gate apparatus, comprising:

a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein said plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create a universal, reconfigurable logic gate thereof; and

a plasticity mechanism based on a plasticity rule for creating stable connections from said plurality of self-assembling chains of nanoparticles for use with said universal, reconfigurable logic gate.

8. The apparatus of claim 7 wherein said plasticity mechanism is based on an input data stream.

9. The apparatus of claim 7 wherein said plasticity mechanism is based on a 2-dimensional binary input data stream.

10. The apparatus of claim 8 further comprising a circuit associated with said plurality of self-assembling chains of nanoparticles, wherein said circuit provides a logic bypass that implements a flip-cycle for second-level logic.

11. The apparatus of claim 8 further comprising at least one extractor logic gate associated with said plurality of self-assembling chains of nanoparticles, wherein said at least one extractor logic gate provides logic functionalities.

12. The apparatus of claim 8 further comprising:

a circuit associated with said plurality of self-assembling chains of nanoparticles, wherein said circuit provides a logic bypass that implements a flip-cycle for second-level logic; and

at least one extractor logic gate associated with said plurality of self-assembling chains of nanoparticles, wherein said at least one extractor logic gate provides logic functionalities.

13. A universal logic gate apparatus, comprising:

a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein said plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create a universal, reconfigurable logic gate thereof; and

a plasticity mechanism based on a plasticity rule for creating stable connections from said plurality of self-assembling chains of nanoparticles for use with said universal, reconfigurable logic gate, wherein said plasticity mechanism is based on an input data stream.

14. The apparatus of claim 13 wherein said input data stream comprises a 2-dimensional binary input data stream.

15. The apparatus of claim 14 further comprising a circuit associated with said plurality of self-assembling chains of nanoparticles, wherein said circuit provides a logic bypass that implements a flip-cycle for second-level logic.

16. The apparatus of claim 14 further comprising at least one extractor logic gate associated with said plurality of self-assembling chains of nanoparticles, wherein said at least one extractor logic gate provides logic functionalities.

17. The apparatus of claim 14 further comprising:

a circuit associated with said plurality of self-assembling chains of nanoparticles, wherein said circuit provides a logic bypass that implements a flip-cycle for second-level logic; and

at least one extractor logic gate associated with said plurality of self-assembling chains of nanoparticles, wherein said at least one extractor logic gate provides logic functionalities.

18. The apparatus of claim 13 wherein said plurality of self-assembling chains of nanoparticles are arranged utilizing dielectrophoresis (DEP).

19. The apparatus of claim 18 wherein said DEP comprises a positive DEP.

20. The apparatus of claim 18 wherein said DEP comprises a negative DEP.