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Method and apparatus for using a one-time or few-time programmable memory with a host device designed for erasable/rewriteable memory

  • US 20070208907A1
  • Filed: 04/27/2007
  • Published: 09/06/2007
  • Est. Priority Date: 08/24/2004
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a memory array, wherein the memory array is organized into logical units that can be partially written into, whereby multiple write operations can be performed to each logical unit before the logic unit is full; and

    a controller in communication with the memory array, wherein the controller is operative to write ECC data for a logical unit when a last write operation is made to the logical unit.

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