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COMPUTER SLEEP/AWAKE CIRCUIT

  • US 20070214371A1
  • Filed: 08/04/2006
  • Published: 09/13/2007
  • Est. Priority Date: 03/10/2006
  • Status: Active Grant
First Claim
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1. A computer sleep/awake circuit comprising:

  • an infrared receiving/sending module sending and receiving infrared detecting signals;

    a micro-control circuit connected to the infrared receiving/sending module for sending command signals to the infrared receiving/sending module and receiving returned detecting signals; and

    a bus control circuit connected between the micro-control circuit and a port of a computer for exchanging data and clock signals with the micro-control circuit and outputting corresponding control signals to the computer to control sleep/awake states of the computer.

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