MEMS Device Wafer-Level Package

• US 20070228540A1
• Filed: 06/04/2007
• Published: 10/04/2007
• Est. Priority Date: 04/29/2002
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Strumpell, Mark, Kocian, Thomas, Knipe, Richard
• Granted Patent: US 7,466,018 B2
• Time in Patent Office: Days
• US Class Current: 257/680
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 99/004 during manufacturing
• CPC Class Codes: B81C 99/0065 Process control; Yield prediction
• CPC Class Codes: G02B 26/0833 the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD G02B26/0825 takes precedence; micromechanical devices in general B81B
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A method and system in which a semiconductor wafer having a plurality of dies is inspected through a visual inspection and/or an electrical test. If certain of the dies on the wafer pass the inspection, then windows are mounted or affixed above those certain dies while they are still a part of the wafer.

Claims

1-21. -21. (canceled)

22. A wafer structure for manufacturing semiconductor devices, the wafer structure comprising:

a) a semiconductor wafer comprising a plurality of dies;

b) an adhesive bead affixed to at least one of the plurality of dies;

b) a window mounted to the least one die by the adhesive bead, wherein at least one of the plurality of dies does not have a window mounted to it.

23. The wafer structure of claim 22 wherein the adhesive bead is affixed about the perimeter of the at least one die.

24. The wafer structure of claim 23 wherein the window, the adhesive bead, and the at least one die, mounted together, form a cavity.

25. The wafer structure of claim 24 wherein the cavity is air-tight.

26. The wafer structure of claim 24 wherein the cavity is hermetic.

27. The wafer structure of claim 22 wherein the at least one die comprises a MEMS device.

28. The wafer structure of claim 22 wherein the window is transparent.

29. The method of claim 28 wherein the window comprises glass.