Method and apparatus for detecting the presence of errors in data transmitted between components in a data storage system using an I2C protocol
First Claim
1. In a storage processor of a data storage system, a method for detecting a transmission error for data transferred over an I2C bus between the storage processor and a controller of the data storage system during a data read procedure, comprising:
- transmitting a data request signal to the controller over the I2C bus to request data from the controller;
receiving a data response signal from the controller over the I2C bus in response to the data request signal;
performing an error detection procedure on the data response signal to form a validation result;
comparing the validation result with a validation threshold; and
detecting (i) that the data response signal does not include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a first comparison result and (ii) that the data reply signal does include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a second comparison result.
9 Assignments
0 Petitions
Accused Products
Abstract
A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.
22 Citations
18 Claims
-
1. In a storage processor of a data storage system, a method for detecting a transmission error for data transferred over an I2C bus between the storage processor and a controller of the data storage system during a data read procedure, comprising:
-
transmitting a data request signal to the controller over the I2C bus to request data from the controller;
receiving a data response signal from the controller over the I2C bus in response to the data request signal;
performing an error detection procedure on the data response signal to form a validation result;
comparing the validation result with a validation threshold; and
detecting (i) that the data response signal does not include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a first comparison result and (ii) that the data reply signal does include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a second comparison result. - View Dependent Claims (2, 3, 4, 5, 10)
-
-
6. A storage processor of a data storage system having a controller and I2C bus configured to provide communication between the storage processor and the controller, the storage processor configured to
transmit a data request signal to the controller over the I2C bus to request data from the controller; -
receive a data response signal from the controller over the I2C bus in response to the data request signal;
perform an error detection procedure on the data response signal to form a validation result;
compare the validation result with a validation threshold; and
detect (i) that the data response signal does not include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a first comparison result and (ii) that the data reply signal does include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a second comparison result. - View Dependent Claims (7, 8, 9)
-
-
11. In a controller of a data storage system, a method for detecting a transmission error for data transferred over an I2C bus between the controller and a storage processor of the data storage system during a data write procedure, comprising:
-
receiving a data transmission signal from the storage processor over the I2C bus, the data transmission signal initiating writing of data to the controller;
performing an error detection procedure on the data transmission signal to form a validation result;
comparing the validation result with a validation threshold; and
detecting (i) that the data transmission signal does not include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a first comparison result and (ii) that the data transmission signal does include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a second comparison result. - View Dependent Claims (12, 13, 14)
-
-
15. A controller of a data storage system having a storage processor and I2C bus configured to provide communication between the controller and the storage processor, the controller configured to:
-
receive a data transmission signal from the storage processor over the I2C bus, the data transmission signal initiating writing of data to the controller;
perform an error detection procedure on the data transmission signal to form a validation result;
compare the validation result with a validation threshold; and
detect (i) that the data transmission signal does not include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a first comparison result and (ii) that the data transmission signal does include errors caused by the I2C bus in the case where the comparison between the validation result and the validation threshold produces a second comparison result. - View Dependent Claims (16, 17, 18)
-
Specification