Radiation hardened differential output buffer

• US 20070236246A1
• Filed: 03/28/2006
• Published: 10/11/2007
• Est. Priority Date: 03/28/2006
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Roper, Weston
• Granted Patent: US 8,115,515 B2
• Time in Patent Office: Days
• US Class Current: 326/9
• CPC Class Codes: H03K 19/00338 In field effect transistor circuits
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission
• CPC Class Codes: H04L 25/028 Arrangements specific to the transmitter end

Abstract

A radiation hardened differential output buffer is partitioned into multiple stages, each including at least one current source and a bridge circuit. Each stage receives substantially the same inputs at substantially the same time, and provides substantially the same output. The outputs of each stage are connected together. As a result, if one of the stages is disrupted by SEE, the disrupted stage does not contribute enough current to the output of the differential output buffer to disrupt the output signal.

Claims

1. A radiation hardened differential output buffer, comprising in combination:

a plurality of stages designed to provide a substantially similar output signal upon receiving a substantially similar input signal, wherein an output of each of the plurality of stages is electrically connected to provide an output of the differential output buffer, and wherein a single stage is unable to change the output of the differential output buffer; and

a pre-drive circuit controlling the plurality of stages by providing the substantially similar input signal to the plurality of stages.

2. The differential output buffer of claim 1, wherein each of the plurality of stages includes at least one current source and a bridge circuit.

3. The differential output buffer of claim 2, wherein each of the plurality of stages includes two current sources.

4. The differential output buffer of claim 2, wherein the bridge circuit includes four transistors.

5. The differential output buffer of claim 2, wherein the bridge circuit includes two transistors and two resistors.

6. The differential output buffer of claim 2, wherein a number of stages included in the plurality of stages is selected based on an amount of current supplied by the at least one current source.

7. The differential output buffer of claim 1, wherein the output signal of each of the plurality of stages is a differential current signal.

8. The differential output buffer of claim 1, wherein the pre-drive circuit provides a complementary digital signal to each of the plurality of stages.

9. The differential output buffer of claim 1, wherein the pre-drive circuit provides the substantially similar input signal to each of the plurality of stages at substantially the same time.

10. The differential output buffer of claim 9, wherein the pre-drive circuit provides the substantially similar input signal to each of the plurality of stages at substantially the same time by controlling when to provide the input signal to each of the stages based on distance from the pre-drive circuit to the stage.

11. The differential output buffer of claim 10, wherein the pre-drive circuit delays the input signal to stages so that the input signal reaches the stages at substantially the same time.

12. A radiation hardened differential output buffer, comprising in combination:

a plurality of stages having two current sources connected to a transistor bridge circuit, wherein each of the plurality of stages is designed to provide a substantially similar differential current output signal upon receiving a substantially similar complementary digital input signal, and wherein an output of each of the plurality of stages is electrically connected to provide an output of the differential output buffer; and

a pre-drive circuit providing the substantially similar complementary digital input signal to each of the plurality of stages, wherein a particle strike on one of the plurality of stages is unable to cause an erroneous signal at the output of the differential output buffer.

13. The differential output buffer of claim 12, wherein a number of stages included in the plurality of stages is selected based on an amount of current supplied by the at least one current source.

14. The differential output buffer of claim 12, wherein the transistor bridge circuit includes two p-channel transistors and two n-channel transistors.

15. The differential output buffer of claim 12, wherein the pre-drive circuit provides the complementary digital input signal to each of the plurality of stages at substantially the same time.

16. The differential output buffer of claim 15, wherein the pre-drive circuit delays the input signal so that the input signal reaches the stages at substantially the same time.

17. A method of radiation hardening a differential output buffer, comprising in combination:

selecting a number of stages having at least one current source and a bridge circuit;

connecting an output of each of the stages to a node; and

driving the stages with a digital signal, wherein each of the stages provides a current signal in response to the digital signal, and wherein an output of one of the stages is unable to disrupt a signal at the node.

18. The method of claim 17, wherein the number of stages selected is based on an amount of current supplied by the at least one current source.

19. The method of claim 17, wherein driving the stages with a digital signal includes controlling the operation of the stages.

20. The method of claim 17, wherein driving the stages with a digital signal includes delaying the digital signal so that the digital signal drives each of the stages at substantially the same time.