DIGITAL SIGNAL TRANSFER USING INTEGRATED TRANSFORMERS WITH ELECTRICAL ISOLATION

• US 20070258513A1
• Filed: 07/11/2007
• Published: 11/08/2007
• Est. Priority Date: 09/18/2002
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Strzalkowski, Bernhard
• Granted Patent: US 10,419,251 B2
• Time in Patent Office: Days
• US Class Current: 375/219
• CPC Class Codes: H04B 3/00 Line transmission systems combined with near-field transmission systems H04B5/00
• CPC Class Codes: H04L 25/00 Baseband systems
• CPC Class Codes: H04L 25/085 Arrangements for reducing interference in line transmission systems, e.g. by differential transmission

Abstract

A digital logic signal isolator and method utilize a coupling module forming an integrated planar transformer having one common transfer channel. The coupling module has an input electrically coupled to a first coupling point and an output electrically coupled to a second coupling of the coupling module, the input being electrically isolated from the output. The isolator includes a transmitter circuit and a receiver circuit. The transmit circuit drives the input in response to a digital logic signal, such that in response to a first type of digital data value in the digital logic signal, a signal of a first predetermined type is supplied to the input and in response to a second type of digital data value in the digital logic signal, a signal of a second predetermined type is supplied to the input, the signals of the first type and the second type each including an initiation signal that announces a predetermined time window during which another portion of the signals representing a digital data value of the first type or the second type will be valid. The receiver circuit is coupled to the output to receive signals in correspondence to the signals provided to the input, the receiver circuit being adapted to decode a received digital logic signal from the received signals, such that the digital logic signals are transferred from the transmitter circuit to the receiver circuit at isolated and different potentials as serial data at a high transfer rate with a high degree of immunity to interference.

Claims

1. A logic signal isolator comprising:

a micro-transformer having a primary winding and a secondary winding;

a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined type is supplied to the primary winding and in response to a second type of edge in the logic signal, a signal of a second predetermined type is supplied to said primary winding, the primary winding and the transmitter being referenced to a first ground;

and the secondary winding being referenced to a second ground which is galvanically isolated from the first ground and said secondary winding supplying to a receiver circuit signals received in correspondence to the signals provided to the primary winding, the receiver reconstructing the received logic signal from the received signals.

2. The isolator of claim 1, wherein the receiver includes circuitry for distinguishing between the received signals corresponding to the transmitted signals of the first type and second type and using the distinguished received signals to reconstitute the received logic signal.

3. The isolator of claim 1 or claim 2, wherein the signals of the first type comprise multiple pulses in a predetermined pattern and the signals of the second type comprise one or more pulses in a different pattern.

4. The isolator of claim 1 or claim 2, wherein the signals of the first type comprise pulses of a first duration and the signals of the second type comprise pulses of a second, distinguishable duration.

5. The isolator of claim 1 or claim 2, wherein at least one of the signals of the first or the second type comprise at least one burst.

6. The isolator of claim 1 or 2, wherein the transmitter circuit is on a first substrate and the receiver is on a second substrate electrically isolated from the first substrate.

7. The isolator of claim 6, wherein the primary winding and the secondary winding are substantially planar windings arrange in a stacked arrangement with at least one of the windings substantially in or on one of the substrates.

8. A digital logic isolator, comprising:

a. a micro-transformer having a primary winding referenced to a first ground and a secondary winding referenced to a second ground isolated from the first ground;

b. means for providing to the primary winding signals of a first type in response to transitions of a first type in an input logic signal;

c. means for providing to the primary winding signals of a second type different from the signals of the first type in response to transitions of a second type in the input logic signal; and

d. means for receiving from the secondary winding signals corresponding to the signals of the first and second types and for reconstituting the input logic signal from them.

9. A method of providing an isolated logic signal output in response to a logic signal input, comprising:

a. providing a micro-transformer having a primary winding referenced to a first ground and a secondary winding referenced to a second ground isolated from the first ground;

b. providing to the primary winding signals of a first type in response to transitions of a first type in the input logic signal;

c. providing to the primary winding signals of a second type different from the signals of the first type in response to transitions of a second type in the input logic signal; and

d. receiving from the secondary winding signals corresponding to the signals of the first and second types and reconstituting the input logic signal from them.

10. The method of claim 9 wherein the signals of a first type comprise multiple pulses, the signals of the second type comprise a single pulse and reconstituting the input logic signal comprises distinguishing between the signals corresponding to said multiple pulses and the signals corresponding to said single pulses so as to provide an output signal reconstituting the transitions in the input logic signal.

11. The method of claim 9 wherein the signals of a first type or the signals of a second type comprise a burst.

12. The method of claim 11 wherein both signals of a first type and the signals of a second type comprise bursts distinguishable from each other by frequency, duration or other characteristic.

13. The method of claim 11 wherein a signal of the first type comprises a pulse of a first duration and a signal of the second type comprises a pulse of a second duration different from the first duration and distinguishable therefrom and reconstituting the input logic signal comprises distinguishing between received signals corresponding to the pulses of a first duration and the pulses of a second duration so as to provide an output signal reconstituting the transitions in the input logic signal.

14. An apparatus for isolated digital signal transfer, comprising:

a coreless planar transformer having a primary coil and a secondary coil;

a transmitter configured to excite the primary coil in response to an input digital signal, such that an announcement signal and a data signal are transferred by the transmitter to the primary coil corresponding to a digital data value of at least a first type or a second type in the input digital signal; and

a receiver configured to receive from the secondary coil received signals corresponding to the data signal and the announcement signal and to decode an output digital signal from the received signals,

wherein the potentials of the transmitter and the receiver are electrically isolated.

15. The apparatus for isolated digital signal transfer of claim 14, wherein the receiver is configured to distinguish between received signals corresponding to the announcement signal and the data signal.

16. The apparatus for isolated digital signal transfer of claim 14, wherein the announcement signal and data signal for the first type comprise multiple pulses in a predetermined pattern and the announcement signal and data signal for the second type comprise one or more pulses in a different pattern.

17. The apparatus for isolated digital signal transfer of claim 14, wherein the announcement signal comprises one or more pulses of a first duration and the data signal comprise one or more pulses of a second duration different than the first duration.

18. The apparatus for isolated digital signal transfer of claim 14, wherein at least one of the announcement signal or the data signal comprise at least one pulse train.

19. The apparatus for isolated digital signal transfer of claim 14, wherein the transmitter is on a first substrate and the receiver is on a second substrate electrically isolated from the first substrate.

20. The apparatus for isolated digital signal transfer of claim 19, wherein the primary coil and the secondary coil are substantially planar coils arranged in a stacked arrangement with at least one of the coils substantially in or on one of the substrates.

21. An apparatus for isolated digital signal transfer, comprising:

a coreless planar transformer having a primary coil and a secondary coil that are electrically isolated from each other;

means for providing to the primary coil announcement signals in response to a digital input signal;

means for providing to the primary coil data signals in response to the digital input signal; and

means for receiving from the secondary coil received signals corresponding to the announcement signals and the data signals and for decoding the received signals as digital output signals.

22. A method of isolated digital signal transfer, comprising:

providing a planar coreless transformer having a primary coil and a secondary coil that are electrically isolated from each other;

providing to the primary coil an announcement signal in response to a digital input signal;

providing to the primary coil a data signal in response to the digital input signal;

receiving from the secondary coil received signals corresponding to the announcement signal and the data signal; and

decoding the received signals as digital output signals.

23. The method of digital signal transfer of claim 22, wherein the data signal comprises multiple pulses and the announcement signal comprises a single pulse and further comprising:

distinguishing between the announcement signal and the data signal; and

providing an output signal corresponding to the input signal.

24. The method of digital signal transfer of claim 22, wherein the announcement signal or the data signal comprises a pulse train.

25. The method of digital signal transfer of claim 24, wherein the announcement signal and the data signal comprise pulse trains distinguishable from each other.

26. The method of digital signal transfer of claim 22, wherein the announcement signal comprises a pulse of a first duration and the data signal comprises a pulse of a second duration different from the first duration and distinguishable therefrom and further comprising:

distinguishing between received signals corresponding to the announcement signal and the data signal; and

providing an output signal corresponding to the input signal.

27. The method of digital signal transfer of claim 22, wherein the announcement signal and data signal are provided to the primary coil at different times.

28. The method of digital signal transfer of claim 27, wherein the announcement signal is provided to the primary coil before the data signal.

29. The method of digital signal transfer of claim 28, wherein the data signal is provided to the primary coil within a time window lasting for a prescribed period after the announcement signal is provided.

30. The method of digital signal transfer of claim 29, wherein the time window does not begin until after the end of the announcement signal.

31. The method of digital signal transfer of claim 28, wherein the data signal includes a signal indicating a binary value or an absence of a signal indicating an opposite binary value.

32. A logic signal isolator comprising:

an isolation structure including one or more micro-transformers, the isolation structure having an input electrically coupled to one or more coils of the one or more micro-transformers and an output electrically coupled to one or more other coils of the one or more micro-transformers, the isolation structure input galvantically isolated from the isolation stage output;

a transmitter circuit which drives the isolation structure input in response to a received logic signal, such that in response to a first type of state change in the logic signal, a signal of a first predetermined type is supplied to the isolation structure input and in response to a second type of state change in the logic signal, a signal of a second predetermined type is supplied to the isolation structure input, the isolation structure output supplying to a receiver circuit signals received in correspondence to the signals provided to the isolation structure input, the receiver reconstructing the received logic signal from the received signals.

33. The isolator of claim 32, wherein the receiver includes circuitry for distinguishing between the received signals corresponding to the transmitted signals of the first type and second type and using the distinguished received signals to reconstitute the received logic signal.

34. The isolator of claim 32 or 33, wherein the signals of the first type comprise multiple pulses in a predetermined pattern and the signals of the second type comprise one or more pulses in a different pattern.

35. The isolator of claim 32 or 33, wherein the signals of the first type comprise pulses of a first duration and signals of the second type comprise pulses of a second, distinguishable duration.

36. The isolator of claim 32 or 33, wherein at least one of the signals of the first or the second type comprise at least one burst.

37. The isolator of claim 32 or 33, wherein the transmitter circuit is on a first substrate and the receiver is on a second substrate electrically isolated from the first substrate.

38. The isolator of claim 37, wherein each of the one or more micro-transformers includes a primary winding and a secondary winding which are substantially planar windings arranged in a stacked arrangement with at least one of the windings substantially in or on one of the substrates.

39. A digital logic signal isolator comprising:

a coupling module forming an integrated planar transformer having one common transfer channel, the coupling module having an input electrically coupled to a first coupling point and an output electrically coupled to a second coupling of the coupling module, the input being electrically isolated from the output;

a transmitter circuit which drives the input in response to a digital logic signal, such that in response to a first type of digital data value in the digital logic signal, a signal of a first predetermined type is supplied to the input and in response to a second type of digital data value in the digital logic signal, a signal of a second predetermined type is supplied to the input, the signals of the first type and the second type each including an initiation signal that announces a predetermined time window during which another portion of the signals representing a digital data value of the first type or the second type will be valid; and

a receiver circuit coupled to the output to receive signals in correspondence to the signals provided to the input, the receiver circuit adapted to decode a received digital logic signal from the received signals,

such that the digital logic signals are transferred from the transmitter circuit to the receiver circuit at isolated and different potentials as serial data at a high transfer rate with a high degree of immunity to interference.

40. The isolator of claim 39, wherein the transmitter circuit is on a first substrate and the receiver is on a second substrate electrically isolated from the first substrate.

41. The isolator of claim 40, wherein the first coupling point and the second coupling point are substantially planar windings arranged in a stacked arrangement with at least one of the windings substantially in or on one of the substrates.

42. The isolator of claim 39, wherein the receiver circuit is adapted to decode a data signal that includes a signal indicating a binary value or an absence of a signal indicating an opposite binary value.