UNIVERSAL WAFER CARRIER FOR WAFER LEVEL DIE BURN-IN

• US 20070285115A1
• Filed: 08/20/2007
• Published: 12/13/2007
• Est. Priority Date: 08/29/1990
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren, Corbett, Tim, Wood, Alan
• Granted Patent: US 7,511,520 B2
• Time in Patent Office: Days
• US Class Current: 324/756.50
• CPC Class Codes: G01R 31/2863 Contacting devices, e.g. sockets, burn-in boards or mounting fixtures in general G01R1/04

Abstract

A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical testing equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical testing are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Claims

1. A fixture for testing a wafer of semiconductor dice comprising:

a first rigid support member for receiving the semiconductor dice in wafer form, the first rigid support member having a plurality of contact members thereon, the plurality of contact members including a plurality of contact tips including at least one contact area for mating with a plurality of bumps on the wafer and a plurality of bump for establishing communication with test circuitry connected to the fixture.

2. The fixture of claim 1, further comprising:

a second support member for selectively engaging the first rigid support member to retain the semiconductor dice in wafer form therebetween, one of the first rigid support member and the second support member including a single cavity for retaining the semiconductor dice in wafer form therein during testing; and

a single biasing assembly including a single floating platform for the single cavity, the single biasing assembly mounted to one of the first rigid support member and second support member, the single biasing assembly for uniformly biasing the plurality of semiconductor dice in wafer form against the contact members.

3. The fixture of claim 2, wherein the wafer comprises a wafer having semiconductor dice having a known configuration for the single cavity.

4. The fixture of claim 1, wherein the semiconductor dice comprises a die cluster in wafer form.

5. The fixture of claim 2, wherein the single biasing assembly comprises the single floating platform in contact with an elastomeric polymer member.

6. The fixture of claim 1, further comprising aligning devices for aligning the first rigid support member with the second support member.

7. The fixture of claim 2, wherein the second support member comprises a partially rigid support member.

8. The fixture of claim 2, wherein the single biasing assembly comprises a biasing assembly using air pressure.

9. The fixture of claim 1, wherein the contact member include a plurality of contacts extending form the first support member for engaging a plurality of conductive contacts on the wafer when the first support member engages the wafer.

10. The fixture of claim 2, wherein the a single biasing assembly in the single cavity for retaining the plurality of semiconductor dice in wafer form therein during testing exerts a sufficiently uniform biasing force on the wafer for causing the wafer to contact portions of the plurality of contact members.

11. The fixture of claim 2, wherein the plurality of contact members include a plurality of rigid conductors which extend into the single cavity when the first support member and the second support member have portions thereof in contact.

12. The fixture of claim 2, wherein the plurality of contact members include a plurality of flexible rods which extend into the single cavity when the first support member and the second support member have portions thereof in contact.

13. The fixture of claim 2, further comprising:

an elastomeric conductor for contacting the wafer in the single cavity.

14. The fixture of claim 13, wherein the elastomeric conductor conducts in patterns corresponding to the conductive bumps of at least a portion of the wafer for electrical contact between the first support plate and the wafer.

15. The fixture of claim 2, further comprising:

a platform corresponding to the single cavity being biased by an elastomeric polymer for uniformly biasing the wafer in contact with the plurality of contact members.

16. The fixture of claim 1, wherein the wafer comprises a wafer package.

34. The fixture of claim 1, wherein the wafer comprises a wafer package.

17. A flexible plate comprising:

a flexible substrate having conductive patterns therein for contacting a contact pad of a semiconductor die and a contact member of another substrate for connecting the semiconductor die to another device.

18. The flexible plate of claim 17, wherein the flexible substrate comprises a flexible substrate in a fixture including:

a first rigid support member for receiving semiconductor dice in wafer form, the first rigid support member having a first contact member on a first side thereof to contact a contact pad of a semiconductor die and connected to a contact member on a second side thereof for connecting the first contact member to circuitry;

a second support member for engaging the first rigid support member to retain semiconductor dice in wafer form therebetween, one of the first rigid support member and the second support member including a single cavity for retaining semiconductor dice in wafer form therein; and

a single biasing assembly including a single floating platform for the single cavity, the single biasing assembly mounted to one of the first rigid support member and second support member, the single biasing assembly sized for uniformly biasing the semiconductor dice in wafer form against the first contact member.

19. The flexible plate of claim 17, wherein the flexible substrate comprises a flexible substrate of one of silicon or ceramic for conforming to the contact pad of a semiconductor die formed on the wafer.

20. The flexible plate of claim 17, wherein the flexible substrate comprises an elastomeric conductor having circuits therein for conforming to the contact pad of a semiconductor die formed on the wafer and connecting the semiconductor die to the first contact member of the first rigid support member.

21. A fixture for operations for a wafer of semiconductor dice comprising:

a first rigid support member for receiving a plurality of semiconductor dice in wafer form, the first rigid support member having a first contact member located on one side thereof, a second contact member located on another side of the first rigid support member connected to the first contact member, the second contact member for mating with a bump on the wafer for a second support member to engage the first rigid support member to retain the semiconductor dice in wafer form in contact with the first rigid support member, one of the first rigid support member and the second support member including a single cavity for retaining the semiconductor dice in wafer form therein.

22. The fixture of claim 21, further comprising:

a single biasing assembly including a floating platform substantially sized for the single cavity, the single biasing assembly mounted to one of the first rigid support member and second support member, the single biasing assembly sized for uniformly biasing the semiconductor dice in wafer form against the contact members.

23. The fixture of claim 21, wherein the wafer comprises a wafer having a plurality of semiconductor dice having a dimension for the single cavity.

24. The fixture of claim 21, wherein the semiconductor dice comprise a die cluster.

25. The fixture of claim 22, wherein the single biasing assembly comprises the single floating platform in contact with an elastomeric polymer member.

26. The fixture of claim 21, further comprising aligning devices for aligning the first rigid support member with the second support member.

27. The fixture of claim 22, wherein the single biasing assembly comprises a biasing assembly using air pressure.

28. The fixture of claim 22, wherein the a single biasing assembly in the single cavity for retaining the semiconductor dice in wafer form therein during testing exerts a sufficiently uniform biasing force on the wafer for causing the wafer to contact a portion of a contact member.

29. The fixture of claim 22, wherein the plurality of contact members include a plurality of rigid conductors which extend into the single cavity when the first support member and the second support member have portions thereof in contact.

30. The fixture of claim 22, wherein the plurality of contact members include a plurality of flexible rods which extend into the single cavity when the first support member and the second support member have portions thereof in contact.

31. The fixture of claim 21, further comprising:

an elastomeric conductor for contacting the wafer in the single cavity.

32. The fixture of claim 31, wherein the elastomeric conductor conducts in patterns corresponding to the conductive bumps of at least a portion of the wafer for electrical contact between the first support plate and the wafer.

33. The fixture of claim 22, further comprising:

a platform corresponding to the single cavity being biased by an elastomeric polymer for biasing the wafer in contact with the plurality of contact members.

35. A fixture for operations for a wafer of semiconductor dice comprising:

a first rigid support member for receiving semiconductor dice in wafer form, the first rigid support member having a first contact member located on one side thereof, a second contact member located on another side of the first rigid support member connected to the first contact member, the second contact member for mating with a contact location on the wafer for a second support member to engage the first rigid support member to retain the semiconductor dice in wafer form in contact with the first rigid support member, one of the first rigid support member and the second support member including a single cavity for retaining the semiconductor dice in wafer form therein.

36. The fixture of claim 35, wherein the contact location on the wafer is solely on one side of the wafer.

37. A method for performing an operation on a wafer having two opposing surfaces using a first plate which includes a biasing mechanism, and a second rigid plate selectively engageable with the first plate, the second rigid plate having a plurality of contact elements extending therefrom and having a cavity for receiving the uncut wafer therein, the wafer having semiconductor dice thereon and at least one interconnect between at least two circuits on the wafer, the method comprising:

placing the wafer between the first plate and the second rigid plate with the plurality of contact elements on the second rigid plate engaging corresponding locations on the wafer, at least one contact element for contacting at least a portion of the interconnect between at least two circuits on the wafer for reducing the number of contact elements on the second rigid plate for contacting the plurality of semiconductor dice on the wafer; and

biasing the plurality of contact elements of the second rigid plate against a surface of the wafer by applying a force to an opposing surface of the wafer to form contact with the first plate, the force caused by the biasing mechanism, and the force applied to substantially the entirety of the opposing surface.

38. The method as claimed in claim 37, wherein the wafer comprises a semiconductor wafer having contacts only on one side.

39. The method as claimed in claim 37, wherein the wafer includes an array of semiconductor dice located thereon.

40. The method as claimed in claim 37, further comprising:

aligning the first plate and the second rigid plate

41. The method as claimed in claim 37, further comprising:

a flexible substrate having circuits therein located between the wafer and the second rigid plate.