SYSTEM AND METHOD FOR IMPROVING DYNAMIC PERFORMANCE OF A CIRCUIT

• US 20070285297A1
• Filed: 06/09/2007
• Published: 12/13/2007
• Est. Priority Date: 06/08/2006
• Status: Active Grant

• Current Assignee: Cosmic Circuits Private Limited
• Original Assignee: Cosmic Circuits Private Limited
• Inventors: Easwaran, Prakash, Bhowmik, Prasenjit, Krishnan, Sundararajan, Khatri, Mukesh, Chakkirala, Sumanth, Srinivasan, C., Venkatesh, T. S., Chandrashekar, L., Kali Bhattacharya, Prasun, Kumar Ghosh, Sanjeeb
• Granted Patent: US 7,538,701 B2
• Time in Patent Office: Days
• US Class Current: 341/155
• CPC Class Codes: H03M 1/0641 the dither being a random signal
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence

Abstract

A system and method for improving the dynamic performance in an analog-to-digital converter (ADC) by randomizing the differential mismatch. The differential mismatch in an input analog signal is randomized by flipping the input signal and output signal randomly.

Claims

1. A method for improving the dynamic performance of a circuit, the method comprising the steps of:

randomly multiplying an input signal of the circuit with a pseudo random bit sequence in an input stage to produce a modified input signal;

processing the modified input signal in the circuit to generate a modified output signal; and

multiplying the modified output signal with the pseudo random bit sequence used at the input stage to produce a final output signal, whereby even harmonics in the final output signal are randomized.

2. The method according to claim 1, wherein the pseudo random bit sequence comprises a random sequence of positive and negative values.

3. The method according to claim 2, wherein the positive values are +1 and the negative values are −

1.

4. The method according to claim 1, wherein the circuit is an analog-to-digital converter (ADC) circuit.

5. The method according to claim 1, wherein the circuit is a switched capacitor circuit.

6. The method of claim 1 further comprising:

removing noise due to offset in the circuit.

7. An analog-to-digital converter (ADC) wherein an analog input signal is multiplied by a pseudo-random bit sequence to produce a modified analog input signal, processing the modified analog input signal in the ADC to produce a modified digital output signal and re-multiplying the digital output signal by the pseudo-random bit sequence to produce a final digital output signal.

8. The analog-to-digital converter (ADC) of claim 7, wherein an offset correction circuit removes noise generated in the ADC.

9. The analog-to-digital converter (ADC) of claim 7, whereby the memory in the analog to digital converter is randomized.

10. A system for improving the dynamic performance of a circuit, the system comprising:

a pseudo-random bit sequence generator for generating a pseudo random bit sequence;

a pair of sampling switches for receiving said pseudo random bit sequence to determine one of an open or closed state of said switches, and for outputting a modified analog input signal as output;

a circuit core for receiving said modified analog input signal as input and for converting said modified analog input signal to a modified digital output signal; and

means for multiplying said modified digital output signal by said pseudo random bit sequence to generate a final output signal.