Method of fabricating vertical structure leds

• US 20080001166A1
• Filed: 09/05/2007
• Published: 01/03/2008
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Jeong, In-Kwon, Yoo, Myung, Lee, Jong-Lam
• Granted Patent: US 7,576,368 B2
• Time in Patent Office: Days
• US Class Current: 257/103
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1-42. -42. (canceled)

43. A vertical light emitting device, comprising:

a support layer;

a first-type GaN based layer over the support layer;

a first electrode disposed between the support layer and the first-type GaN based layer such that the first-type GaN based layer is over the first electrode;

a second-type GaN based layer over the first-type GaN based layer;

a light emitting layer disposed between the first-type GaN based layer and the second GaN based layer;

an undoped GaN based layer over the second-layer GaN based layer; and

a second electrode over the second-type GaN based layer or the undoped GaN based layer, wherein the first electrode and the second electrode are respectively located at an opposite side of the light emitting layer

44. The light emitting device of claim 43, wherein the first-type GaN based layer is a p-GaN based layer and the second-type GaN based layer is an n-GaN based layer.

45. The light emitting device of claim 43, further comprising a cover layer over exposed portions of the first-type GaN based layer, of the light emitting layer and the second-type GaN based layer.

46. The light emitting device of claim 45, wherein the cover layer includes at least one of Si, O, and N.

47. The light emitting of claim 45, wherein the cover layer is a passivation layer.

48. The light emitting device of claim 43, wherein the support layer is a metallic layer.

49. The light emitting device of claim 48, wherein the metallic layer includes at least one of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, Ti and Al.

50. A vertical light emitting device, comprising;

a support layer;

a first-type GaN based layer over the support layer;

a first electrode disposed between the support layer and the first-type GaN based layer;

a second-type GaN based layer thicker than the first-type GaN based layer over the first-type GaN based layer;

a light-emitting layer disposed between the first-type GaN based layer and the second-type GaN based layer; and

a second electrode over the second-type GaN based layer, wherein the first electrode and the second electrode are respectively located at an opposite side of the light-emitting layer.

51. The light emitting device of claim 50, wherein the first-type GaN based layer is a p-GaN based layer and the second-type GaN based layer is an n-GaN based layer.

52. The light emitting device of claim 50, further comprising a cover layer over exposed portions of the first-type GaN based layer, of the light emitting layer and the second-type GaN based layer.

53. The light emitting device of claim 52, wherein the cover layer includes at least one of Si, O, and N.

54. The light emitting device of claim 52, wherein the cover layer is a passivation layer.

55. The light emitting device of claim 50, wherein the support layer is a metallic layer.

56. The vertical light emitting device according to claim 55, wherein the metallic layer includes at least one Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, Ti and Al.

57. A vertical light emitting device, comprising;

a support layer;

a first electrode over the support layer;

a semiconductor layer having a multilayer structure;

a cover layer covering at least one exposed portions of the semiconductor layer, the cover layer includes at least one function of protection and insulation for the semiconductor layer; and

a second electrode over the semiconductor layer, wherein the first electrode and the second electrode are respectively located at an opposite side of the semiconductor layer.

58. The vertical light emitting device of claim 57, wherein the semiconductor layer including:

a first-type GaN based layer;

an active layer over the first-type GaN based layer; and

a second-type GaN based layer over the active layer.

59. The vertical light emitting device of claim 57, wherein the cover layer is disposed higher than the second electrode.

60. The vertical light emitting device of claim 57, wherein the cover layer comprises material including at least one of Si, O, and N.

61. The vertical light emitting device of claim 58, wherein the cover layer surrounds at least two side portions of the first-type GaN based layer, of the active layer, and of the second-type GaN based layer.