Technique for low-temperature ion implantation

• US 20080044938A1
• Filed: 08/15/2006
• Published: 02/21/2008
• Est. Priority Date: 08/15/2006
• Status: Active Grant

• Current Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Original Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Inventors: Blake, Julian, Murphy, Paul J., Walther, Steven R., England, Jonathan, Muka, Richard S., Liebert, Reuel B.
• Granted Patent: US 7,935,942 B2
• Time in Patent Office: Days
• US Class Current: 438/51
• CPC Class Codes: H01L 21/26593 at a temperature lower than room temperature
• CPC Class Codes: H01L 21/67098 Apparatus for thermal treatment
• CPC Class Codes: H01L 21/67109 mainly by convection
• CPC Class Codes: H01L 21/67213 comprising at least one ion or electron beam chamber coating by ion implantation C23C; ion or electron beam tubes H01J37/00
• CPC Class Codes: H01L 21/67248 Temperature monitoring

Abstract

A technique for low-temperature ion implantation is disclosed. In one particular exemplary embodiment, the technique may be realized as an apparatus for low-temperature ion implantation. The apparatus may comprise a pre-chill station located in proximity to an end station in an ion implanter. The apparatus may also comprise a cooling mechanism within the pre-chill station. The apparatus may further comprise a loading assembly coupled to the pre-chill station and the end station. The apparatus may additionally comprise a controller in communication with the loading assembly and the cooling mechanism to coordinate loading a wafer into the pre-chill station, cooling the wafer down to a predetermined temperature range, and loading the cooled wafer into the end station where the cooled wafer undergoes an ion implantation process.

Claims

1. An apparatus for low-temperature ion implantation, the apparatus comprising:

a pre-chill station located in proximity to an end station in an ion implanter;

a cooling mechanism within the pre-chill station;

a loading assembly coupled to the pre-chill station and the end station; and

a controller in communication with the loading assembly and the cooling mechanism to coordinate loading a wafer into the pre-chill station, cooling the wafer down to a predetermined temperature range, and loading the cooled wafer into the end station where the cooled wafer undergoes an ion implantation process.

2. The apparatus according to claim 1, wherein the pre-chill station encloses a first vacuum space, and the end station enclosing a second vacuum space separate from the first vacuum space.

3. The apparatus according to claim 1, wherein the ion implanter is a single-wafer ion implanter that processes one wafer at a time in the end station.

4. The apparatus according to claim 1, wherein the controller is further adapted to cause the loading assembly to remove the wafer from the end station immediately after the ion implantation process.

5. The apparatus according to claim 1, wherein the end station comprises a platen that holds the wafer during the ion implantation process, and wherein the wafer is thermally substantially isolated from the platen.

6. The apparatus according to claim 5, wherein the platen comprises a plurality of mesa structures that support the wafer, such that total contact area between the platen and the wafer is substantially smaller than the wafer surface.

7. The apparatus according to claim 5, wherein the platen facilitates tilting and rotation of the wafer.

8. The apparatus according to claim 1, wherein the pre-chill station comprises a fixed platen that holds the wafer for cooling.

9. The apparatus according to claim 8, wherein the fixed platen comprises lift pins to accommodate loading and unloading of the wafer by the loading assembly.

10. The apparatus according to claim 1, wherein the wafer is attached to an object to achieve a larger thermal mass such that the wafer experiences a smaller temperature increase during the ion implantation process.

11. The apparatus according to claim 10, wherein the object is a carrier plate that is heavier than the wafer.

12. The apparatus according to claim 11, wherein the wafer is attached to the carrier plate with carbon dioxide below its sublimation temperature.

13. The apparatus according to claim 11, wherein the carrier plate comprises at least one thermal sensor embedded therein.

14. The apparatus according to claim 11, wherein the carrier plate has embedded therein a cooling/heating mechanism.

15. The apparatus according to claim 1, wherein the ion implantation process is part of a plasma doping process.

16. The apparatus according to claim 1, wherein the cooling mechanism cools the wafer based on one or more techniques selected from a group consisting of:

gas cooling, coolant circulation, coolant phase change, Peltier heat transfer, and a built-in cryopump.

17. The apparatus according to claim 1, wherein an amount of temperature increase due to the ion implantation process is predicted for the wafer, and wherein the controller is further configured to cause the wafer to be cooled based at least in part on the predicted amount of temperature increase to avoid overheating the wafer during the ion implantation process.

18. The apparatus according to claim 1, wherein the pre-chill station is part of a loadlock coupled to the end station.

19. The apparatus according to claim 1, wherein at least part of the pre-chill station and the cooling mechanism is incorporated into the loading assembly.

20. A method for low-temperature ion implantation, the method comprising the steps of:

loading a wafer into a first vacuum space;

cooling the wafer to a predetermined temperature range while the wafer is in the first vacuum space;

loading the cooled wafer to a second vacuum space separate from the first vacuum space; and

performing an ion implantation process on the cooled wafer in the second vacuum space.

21. The method according to claim 20, further comprising:

attaching a carrier plate to a backside of the wafer to achieve a larger thermal mass such that the wafer experiences an insignificant temperature increase during the ion implantation process.

22. The method according to claim 20, further comprising:

removing the wafer from the second vacuum space immediately after the ion implantation process.

23. The method according to claim 20, further comprising:

warming up the wafer above a dew point after the ion implantation process.

24. The method according to claim 20, further comprising:

predicting an amount of temperature increase for the wafer due to the ion implantation process; and

cooling the wafer based at least in part on the predicted amount of temperature increase to avoid overheating the wafer during the ion implantation process.

25. The method according to claim 20, further comprising:

pausing the ion implantation process;

re-cooling the wafer to a desired temperature; and

resuming the ion implantation process.

26. The method according to claim 20, wherein the ion implantation process is part of a plasma doping process.

27. The method according to claim 20, further comprising:

outgasing the wafer prior to the ion implantation process.

28. The method according to claim 20, further comprising:

performing a diffusion-less anneal after the ion implantation process.

29. At least one signal embodied in at least one carrier wave for transmitting a computer program of instructions configured to be readable by at least one processor for instructing the at least one processor to execute a computer process for performing the method as recited in claim 20.

30. At least one processor readable carrier for storing a computer program of instructions configured to be readable by at least one processor for instructing the at least one processor to execute a computer process for performing the method as recited in claim 20.

31. An ion implanter comprising:

at least one end station;

at least one pre-chill station located in proximity to the at least one end station, the at least one pre-chill station having a cooling mechanism;

a loading assembly coupled to the at least one end station and the at least one pre-chill station; and

a controller configured to cause a wafer to be loaded into the at least one pre-chilled station and cooled to a predetermined temperature range before the wafer is loaded into the end station to undergo an ion implantation process.

32. A method for ion implantation and dopant activation, the method comprising the steps of:

performing an ion implantation process on a wafer, wherein, during the ion implantation process, a temperature of the wafer is maintained within a range that is lower than room temperature; and

performing a diffusion-less anneal on the wafer after the ion implantation process.

33. The method according to claim 32, wherein, prior to the ion implantation process, the wafer is pre-chilled to a desired temperature range, and wherein, during the ion implantation process, the wafer is placed on a platen that is at least partially thermally insulated from the wafer.

34. The method according to claim 32, wherein the temperature of the wafer is maintained within the range based on one or more techniques selected from a group consisting of:

gas cooling, coolant circulation, coolant phase change, Peltier heat transfer, and a built-in cryopump.

35. The method according to claim 32, wherein the diffusion-less anneal is performed using a laser.