Data Processing Apparatus And Data Control Circuit For Use Therein

• US 20080071972A1
• Filed: 09/12/2007
• Published: 03/20/2008
• Est. Priority Date: 09/13/2006
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Kimura, Hiromitsu
• Granted Patent: US 8,019,929 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 1/305 in the event of power-supply fluctuations
• CPC Class Codes: G06F 11/1441 Resetting or repowering

Abstract

A data processing apparatus has a data saving control portion. At shutdown, within the period after a fall in the source voltage is detected until the source voltage falls down to the lower limit at which the apparatus is guaranteed to operate, the data saving control portion saves to a non-volatile memory all the data needed to restore the state of an electronic circuit portion.

Claims

1. A data processing apparatus, comprising:

a data saving control circuit that saves, at shutdown, to a non-volatile memory all data needed to restore a state of an electronic circuit portion within a period after a fall in a source voltage is detected until the source voltage falls down to a lower limit voltage at which the apparatus is guaranteed to operate.

2. The data processing apparatus of claim 1, further comprising:

a data restoration control circuit that restores, at power-on, the data saved to the non-volatile memory to the electronic circuit portion within a period after the source voltage rises up to the lower limit voltage at which the apparatus is guaranteed to operate until the electronic circuit portion begins to operate.

3. The data processing apparatus of claim 1, wherein

the electronic circuit portion saves/restores the data needed to restore the state thereof by performing serial data transfer.

4. The data processing apparatus of claim 3, wherein

the electronic circuit portion comprises:

in addition to a first signal path used in a normal operation, a second signal path for switching flip-flops into a shift register configuration according to a predetermined control signal.

5. The data processing apparatus of claim 3, further comprising:

a serial/parallel converting portion that performs, at a time of data saving, serial-to-parallel conversion on data inputted from the electronic circuit portion in a serial manner and then outputs the data thus converted to the non-volatile memory, and performs, at a time of data restoration, parallel-to-serial conversion on the data inputted from the non-volatile memory in a parallel manner and then outputs the data thus converted to the electronic circuit portion.

6. The data processing apparatus of claim 1, wherein

the non-volatile memory stores register data in a non-volatile manner by exploiting ferroelectric hysteresis, a magnetroresistive effect of a magnetic substance, or a phase change of a device.

7. A data control circuit, comprising:

a data saving control function portion connected to an electronic circuit having a data input port and a data output port that are used for making access to a storage device provided in the electronic circuit from outside the electronic circuit, the data saving control function portion saving data of the electronic circuit to an outside of the electronic circuit via the data output port.

8. The data control circuit of claim 7, wherein

the data in the electronic circuit is register data.

9. The data control circuit of claim 8, further comprising:

a data restoration control function portion restoring the register data saved to the outside the electronic circuit to a register of the electronic circuit via the data input port.

10. The data control circuit of claim 9, wherein

the data control circuit monitors turn-on/shutdown of power to the electronic circuit, so as to save the register data of the electronic circuit at shutdown and restore the register data to the register of the electronic circuit at power-on.

11. The data control circuit of claim 9, further comprising:

a power supply control portion controlling turn-on/shutdown of power to the electronic circuit; and

a status monitoring portion monitoring an operating status of the electronic circuit,

wherein the data processing apparatus performs

when the electronic circuit has entered a standby state, saving of the register data and shutdown of power to the electronic circuit,

when the electronic circuit has to be restored from the standby state, turn-on of power to the electronic circuit and restoration of the register data.

12. The data control circuit of claim 11, wherein

the status monitoring portion monitors an input/output signal exchanged between the electronic circuit and a peripheral circuit, and checks the operating status of the electronic circuit.

13. The data control circuit of claim 12, wherein

the status monitoring portion detects

when a data request signal is sent from the electronic circuit to the peripheral circuit, that the electronic circuit has entered a standby state,

when a response signal is sent from the peripheral circuit to the electronic circuit, that the electronic circuit has to be restored from the standby state.

14. The data control circuit of claim 9, wherein

the data control circuit performs replacement of the register data according to a process to be executed by the electronic circuit.

15. The data control circuit of claim 14, wherein

the data control circuit performs data saving operation and data restoration operation simultaneously when performing replacement of the register data.

16. A data processing apparatus, comprising:

an electronic circuit having a register data input port and a register data output port that are used for making access to a register provided in the electronic circuit from outside the electronic circuit;

a data control circuit having a data saving control function portion that saves register data of the electronic circuit to an outside of the electronic circuit, and a data restoration control function portion that restores the register data saved to the outside of the electronic circuit to the register of the electronic circuit; and

a storage circuit to which the register data is saved.

17. The data processing apparatus of claim 16, wherein

the electronic circuit and the data control circuit are integrated into a single chip.

18. The data processing apparatus of claim 16, wherein

the electronic circuit and the data control circuit are integrated into different chips.

19. The data processing apparatus of claim 16, wherein

the electronic circuit has, as the register data input port and the register data output port, parallel ports through which a plurality of pieces of register data are inputted/outputted in a parallel manner.

20. The data processing apparatus of claim 16, wherein

the electronic circuit comprises:

in addition to a first signal path used in a normal operation, a second signal path for switching flip-flops into a shift register configuration according to a predetermined control signal; and

as the register data input port and the register data output port, serial ports connected to the second signal path, the serial ports through which a plurality of pieces of register data are inputted/outputted in a serial manner.

21. The data processing apparatus of claim 20, wherein

the register data input port and the register data output port of the electronic circuit serve as a debug port.

22. The data processing apparatus of claim 16, wherein

the storage circuit comprises an SRAM, a DRAM, an EEPROM, a flash memory, an FeRAM, an MRAM, a PRAM, an RRAM, an NVSRAM, a BBSRAM, and a memory of a similar kind, or a latch, a register, and a storage device of a similar kind.

23. A data processing apparatus, comprising:

an electronic circuit; and

a data control circuit connected to the electronic circuit;

wherein the data control circuit comprises;

a data saving control portion that saves data of the electronic circuit to an outside of the electronic circuit;

a data restoration control portion that restores the data saved to the outside of the electronic circuit to the electronic circuit;

a restoration monitoring control portion that monitors a data restoration state of another data processing apparatus; and

an operation resumption control portion that stops an operation of the electronic circuit until data restoration of all the data processing apparatuses is completed.

24. The data processing apparatus of claim 23, wherein

the data restoration control portion sends a notification signal indicating that data restoration of the electronic circuit is completed at a completion of data restoration.

25. The data processing apparatus of claim 24, wherein

by monitoring the notification signal sent from each of a plurality of data processing apparatuses or a logic operation signal thereof, the restoration monitoring control portion judges whether or not data restoration of all the data processing apparatuses is completed.

26. The data processing apparatus of claim 23, wherein

the operation resumption control portion controls a drive clock to be fed or not to be fed to the electronic circuit.

27. The data processing apparatus of claim 23, wherein

the data control circuit comprises a status monitoring portion that monitors an operating status of the electronic circuit,

based on a monitoring result, the data control circuit controls data saving/restoration of the electronic circuit.

28. The data processing apparatus of claim 27, wherein

when a data request signal is sent from the electronic circuit to a peripheral circuit, the status monitoring portion detects that the electronic circuit has entered a standby state,

when a response signal is sent from the peripheral circuit to the electronic circuit, the status monitoring portion detects that the electronic circuit has to be restored from the standby state.

29. The data processing apparatus of claim 27, wherein

the status monitoring portion judges an operating status of the electronic circuit by monitoring a process stop signal from the electronic circuit.

30. The data processing apparatus of claim 27, wherein

the status monitoring portion judges an operating status of the electronic circuit by monitoring a dedicated signal indicating a standby state of the electronic circuit.

31. The data processing apparatus of claim 27, wherein

the status monitoring portion judges an operating status of the electronic circuit by monitoring data exchanged via a general-purpose data input/output port of the electronic circuit.