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Semiconductor device

  • US 20080073719A1
  • Filed: 10/25/2007
  • Published: 03/27/2008
  • Est. Priority Date: 06/18/2001
  • Status: Active Grant
First Claim
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1. A semiconductor memory cell, comprising:

  • at least one transistor, wherein the at least one transistor comprises;

    a source region having a first doping profile;

    a drain region having a second doping profile wherein the first doping profile is different from the second doping profile;

    a body region disposed between the source region and the drain region, wherein the body region is electrically floating; and

    a gate spaced apart from, and capacitively coupled to, the body region;

    wherein the memory cell stores at least one data state including (1) a first data state which corresponds to a first charge in the body region of the transistor of the memory cell, and (2) a second data state which corresponds to a second charge in the body region of the transistor of the memory cell.

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