Semiconductor device and method for manufacturing same

• US 20080135932A1
• Filed: 12/04/2007
• Published: 06/12/2008
• Est. Priority Date: 12/06/2006
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Fujii, Tetsuo, Ozeki, Yoshihiko, Kouno, Kenji
• Granted Patent: US 8,026,572 B2
• Time in Patent Office: Days
• US Class Current: 257/334
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 25/074 Stacked arrangements of non-apertured devices
• CPC Class Codes: H01L 27/0694 comprising components formed on opposite sides of a semiconductor substrate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device having plural active and passive elements on one semiconductor substrate is manufactured in the following cost effective manner even when the active and passive elements include double sided electrode elements. When the semiconductor substrate is divided into plural field areas, an insulation separation trench that penetrates the semiconductor substrate surrounds each of the field areas, and each of the either of the plural active elements or the plural passive elements. Further, each of the plural elements has a pair of power electrodes for power supply respectively disposed on each of both sides of the semiconductor substrate to serve as the double sided electrode elements.

Claims

1. A semiconductor device with one of plural active elements and plural passive elements formed on one semiconductor substrate, the semiconductor device comprising:

plural field areas on the semiconductor substrate; and

an insulation separation trench that surrounds the plural field areas,

wherein the insulation separation trench penetrates the semiconductor substrate for dividing the semiconductor substrate into the plural field areas,

each of the field areas includes one of the plural active elements and plural passive elements, and

at least two elements among the plural active elements and the plural passive elements have a pair of power electrodes for power supply disposed on both sides of the semiconductor substrate.

2. The semiconductor device of claim 1,

wherein a half-bridge circuit is formed in the semiconductor device,

the semiconductor device has a vertical transistor element composed of one of two vertical MOS transistor elements and two IGBT elements of a same structure as double sided electrode elements,

the half-bridge circuit is formed by two vertical transistor elements connected in series with another double sided electrode element interposed therebetween, and

the half-bridge circuit outputs its output from a connection point of two vertical transistor elements.

3. The semiconductor device of claim 2,

wherein the semiconductor device has a power module of a three-phase inverter formed therein,

the semiconductor device has three sets of the half-bridge circuit, and

each phase output of the three-phase inverter is taken out from the connection point of the two vertical transistor elements connected in series in each of the three sets of the half-bridge circuit.

4. The semiconductor device of claim 3,

wherein the semiconductor device has a H bridge circuit formed therein,

the semiconductor device has two sets of the half-bridge circuit, and

an output of the H bridge circuit is taken out from each of the connection points of the two vertical transistor elements connected in series in each of the two sets of the half-bridge circuit.

5. The semiconductor device of claim 1,

wherein two semiconductor devices are paired to form a half-bridge circuit,

each of the two semiconductor devices includes, as a double sided electrode element, a vertical transistor element of a same structure made of one of a vertical MOS transistor element and an IGBT element,

the two semiconductor devices are layered with one lead interposed therebetween,

the vertical transistor element in each of the two semiconductor devices is connected with each other in series through the one lead, and

the half-bridge circuit outputs an output of the half-bridge circuit from the one lead.

6. The semiconductor device of claim 5,

wherein the two semiconductor devices are paired to form the power module of the three-phase inverter,

each of the semiconductor device includes the three vertical transistor elements as the double sided electrode element,

the two semiconductor devices are used to form three sets of the half-bridge circuit, and

each of the three leads outputs each phase output of the three-phase inverter.

7. The semiconductor device of claim 5,

wherein two semiconductor devices are paired to form the half-bridge circuit,

each of the two semiconductor devices includes, as a double sided electrode element, the two vertical transistor elements,

the two semiconductor devices are used to form two sets of the half-bridge circuit, and

the H bridge circuit outputs an output of the H bridge circuit from the two leads.

8. The semiconductor device of claim 2,

wherein a diode element made of another double sided electrode element is connected in parallel with the vertical transistor element.

9. The semiconductor device of claim 1,

wherein the double sided electrode element is used as a power element for power supply,

at least one element among the plural active elements and the plural passive elements in the semiconductor device has, as a single sided electrode element, a pair of power electrode for power supply on a surface of only one side of the semiconductor substrate, and

the single sided electrode element is used to control the double sided electrode element.

10. The semiconductor device of claim 1,

wherein the double sided electrode element has a pair of electrodes, and

the pair of electrodes are respectively wired for connection on both sides of the semiconductor substrate.

11. The semiconductor device of claim 1,

wherein the electrode of the double sided electrode element on one side of the semiconductor substrate is connected by a wire disposed on a circuit substrate.

12. The semiconductor device of claim 1,

wherein the double sided electrode element is a power element for power supply,

the electrode of the double sided electrode element on one side of the semiconductor device is connected to a heatsink disposed on a circuit substrate.

13. The semiconductor device of claim 1,

wherein the semiconductor device is for use on an automotive vehicle.

14. The semiconductor device of claim 1,

wherein the semiconductor substrate is an epitaxial substrate that has a silicon epitaxial layer formed on a bulk single crystal silicon substrate.

15. The semiconductor device of claim 1,

wherein the insulation separation trench is one of a trench that has an insulator buried therein, a trench that has a conductor buried therein with a side wall oxide film and a trench that has a hollow formed therein.

16. The semiconductor device of claim 1,

wherein the semiconductor substrate has one of a different conductor-type impurity diffusion layer and a different density impurity diffusion layer relative to the semiconductor substrate formed on at least one side of the semiconductor substrate.

17. The semiconductor device of claim 16,

wherein the impurity diffusion layer is formed in a portion of the field areas among the plural field areas.

18. A method of manufacturing a semiconductor device with a semiconductor substrate including plural field areas separated by a surrounding substrate penetrating insulation separation trench, wherein the semiconductor substrate has formation of plural active elements or plural passive elements made of the semiconductor substrate, wherein the plural active elements and the plural passive elements are distributed in different field areas, wherein at least two elements among the plural active elements and the plural passive elements have a pair of power electrode for power supply distributed on both sides of the semiconductor substrate, the method of manufacturing the semiconductor device as a double sided electrode element comprising:

preparing an element formation semiconductor substrate having a predetermined thickness;

forming a yet-penetrating insulation separation trench from a first side surface of the element formation semiconductor substrate by a predetermined depth for surrounding each of the plural field areas;

polishing the element formation substrate from a second side to expose a tip of the yet-penetrating insulation separation trench for forming the element formation substrate as the semiconductor substrate and for forming the yet-penetrating insulation separation trench as the insulation separation trench;

forming either of the plural active elements or the plural passive elements on the first side of the element formation semiconductor substrate; and

forming either of the plural active elements or the plural passive elements on the second side of the semiconductor substrate after the polishing the element formation substrate.

19. The semiconductor device of claim 18,

wherein the first side element formation process is performed between the yet-penetrating insulation separation trench formation process and the substrate polish process.

20. The semiconductor device of claim 18,

wherein the element formation semiconductor substrate is an epitaxial substrate that has a silicon epitaxial layer formed on a bulk single crystal silicon substrate, and

a first side surface of the element formation semiconductor substrate is the silicon epitaxial layer.

21. The semiconductor device of claim 18,

wherein the yet-penetrating insulation separation trench is one of a trench that has an insulator buried therein, a trench that has a conductor buried therein with a side wall oxide film and a trench that has a hollow formed therein.

22. The semiconductor device of claim 18,

wherein the semiconductor substrate has one of a different conductor-type impurity diffusion layer and a different density impurity diffusion layer relative to the semiconductor substrate formed on at least one side of the semiconductor substrate, and

an ion injection process is performed for forming the impurity diffusion layer after the substrate polish process.

23. The semiconductor device of claim 22,

wherein the impurity diffusion layer is formed in a portion of the field areas among the plural field areas.