DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER

• US 20080142983A1
• Filed: 02/25/2008
• Published: 06/19/2008
• Est. Priority Date: 02/24/1999
• Status: Abandoned Application

• Current Assignee: Li Li, Tongbi Jiang
• Original Assignee: Li Li, Tongbi Jiang
• Inventors: Jiang, Tongbi, Li, Li
• Application Number:
  US12/036,887
• Publication Number:
  US 20080142983A1
• Time in Patent Office: Days
• US Class Current: 257/765
• CPC Class Codes: H01L 21/02052 Wet cleaning only H01L21/02085 takes precedence
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01011 Sodium [Na]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01016 Sulfur [S]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01075 Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: Y10S 134/902 : Semiconductor wafer

Abstract

A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material which resists formation of resistive oxides. In particular, a tank is divided into three compartments, each holding a different solution: a lower compartment and two upper compartments divided by a barrier, which extends across and partway down the tank. The solutions have different densities and therefore separate into different layers. In the illustrated embodiment, integrated circuits with patterned contact pads are passed through one of the upper compartments, in which oxide is removed from the contact pads. Continuing downward into the lower compartment and laterally beneath the barrier, a protective layer is selectively formed on the insulating layer surrounding the contact pads. As the integrated circuits are moved upwardly into the second upper compartment, a conducting monomer selectively forms on the contact pads prior to any exposure to air. The integrated circuits can then be transferred to an ozone chamber where polymerization results in a conductive passivation layer on the contact pad.

Claims

1. A contact pad of an integrated circuit die, the contact pad adapted to provide electrical connection between the integrated circuit die and an electrical system, the contact pad comprising:

a conductive layer; and

a conductive passivation layer directly on the conductive layer.

2. The contact pad of claim 1, wherein the conductive layer comprises aluminum.

3. The contact pad of claim 1, wherein the conductive layer comprises an aluminum alloy formed with copper, silicon, or both copper and silicon.

4. The contact pad of claim 1, wherein the conductive layer comprises an aluminum-copper alloy with about 0.5% copper content.

5. The contact pad of claim 1, wherein the conductive layer comprises a portion of a conductive line of the integrated circuit die.

6. The contact pad of claim 1, wherein the contact pad is integrally connected to a conductive line of the integrated circuit die, the conductive line comprising a metallic material.

7. The contact pad of claim 6, wherein the metallic material comprises aluminum, aluminum-silicon eutectic, or aluminum-copper alloy.

8. The contact pad of claim 1, wherein the contact pad is integrally connected to a conductive line of the integrated circuit die, the conductive line comprising polysilicon.

9. The contact pad of claim 1, wherein the contact pad comprises no intervening oxide material between the conductive layer and the conductive passivation layer.

10. The contact pad of claim 1, wherein the conductive passivation layer comprises a conductive polymer material.

12. The integrated circuit die of claim 1, wherein the substrate comprises a semiconductor layer.

13. The integrated circuit die of claim 12, wherein the semiconductor layer comprises gallium arsenide or silicon.

11. An integrated circuit die comprising:

a substrate;

a conductive line on or within the substrate; and

a contact pad electrically coupled to the conductive line, the contact pad comprising a conductive layer and a conductive passivation layer directly on the conductive layer.

14. The integrated circuit die of claim 11, further comprising an insulating layer comprising a dielectric material, the insulating layer over the conductive layer and having a hole which exposes a portion of the conductive layer.

15. The integrated circuit die of claim 14, wherein the dielectric material comprises silicon dioxide, silicon nitride, or silicon oxynitride.

16. A method of making an integrated circuit, comprising:

providing a substrate;

forming electrical devices on the substrate;

immersing the substrate in a cleaning fluid; and

transferring the substrate from the cleaning fluid to a separate plating fluid while keeping the substrate immersed in fluid.

17. A method of making an integrated circuit die, comprising:

providing a substrate comprising a metal surface;

forming electrical devices on the substrate;

immersing the integrated circuit die in a container holding a plurality of solutions, wherein each of said plurality of solutions is in contact with at least one other of said plurality of solutions, thereby allowing direct transfer of said integrated circuit die between said plurality of solutions in said container;

exposing the metal surface to an oxide cleaning solution within the container;

preferentially forming a layer comprising a conducting monomer after exposing the metal surface to the oxide cleaning solution and prior to removing the integrated circuit die from the container; and

polymerizing said conducting monomer layer.

18. A contact pad of an integrated circuit die, the contact pad adapted to provide electrical connection between the integrated circuit die and an electrical system, the contact pad comprising:

means for conducting electricity from an integrated circuit die to at least one outside circuit; and

means for passivating the conducting means.

19. The contact pad of claim 18, wherein the conducting means comprises a conductive layer.

20. The contact pad of claim 18, wherein the passivating means comprises a conductive passivation layer directly on the conducting means.

21. An apparatus for sequential in situ cleaning and formation of a conductive passivation layer on a conductive element in an integrated circuit, the apparatus comprising:

means for cleaning the integrated circuit;

means for forming a protective layer on the integrated circuit;

means for forming a monomer layer on the integrated circuit;

means for separating the cleaning means, the protective layer forming means, and the monomer layer forming means, wherein the separating means is positioned to separate the cleaning means from the monomer layer forming means; and

means for containing the cleaning means, the protective layer forming means, and the monomer layer forming means, wherein the cleaning means is above and in contact with the protective layer forming means, and the monomer layer forming means is above and in contact with the protective layer forming means, such that the integrated circuit can be transferred from the cleaning means to the protective layer forming means, and then to the monomer layer forming means, while keeping the substrate immersed in fluid.

22. The apparatus of claim 21, wherein the cleaning means comprises a cleaning solution.

23. The apparatus of claim 21, wherein the protective layer forming means comprises a siliconizing solution.

24. The apparatus of claim 21, wherein the monomer layer forming means comprises a plating solution.

25. The apparatus of claim 21, wherein the separating means comprises a water-tight barrier.

26. The apparatus of claim 21, wherein the containing means comprises a tank.