SYSTEM AND METHOD TO EXTEND SYNCHRONOUS OPERATION OF AN ACTIVE CONVERTER IN A VARIABLE SPEED DRIVE
First Claim
1. A variable speed drive system configured to receive an input AC voltage at a fixed AC input voltage and provide an output AC power at a variable voltage and variable frequency, the variable speed drive comprising:
- a converter stage connected to an AC power source providing the input AC voltage, the converter stage being configured to convert the input AC voltage to a boosted DC voltage;
a DC link connected to the converter stage, the DC link being configured to filter and store the boosted DC voltage from the converter stage; and
an inverter stage connected to the DC link, the inverter stage being configured to convert the boosted DC voltage from the DC link into the output AC power having the variable voltage and the variable frequency; and
a phase angle control circuit comprising;
a squaring amplifier, a first phase-lock loop circuit associated and a second phase-lock loop circuit;
the squaring amplifier configured to receive the AC power source and output a a substantially rectangular output signal based on the AC power source;
the first phase-lock loop circuit including a first lag-lead filter configure to have a high filter cutoff frequency and a first capacitor to provides the converter stage with a phase angle parameter; and
the second phase-lock loop circuit including a second lag-lead filter configured to have a low cutoff frequency and a second capacitor to provide the lag-lead filter the capability of storing an angle of the mains voltage in the feedback loop of the PLL during mains interruption.
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Accused Products
Abstract
Systems and methods for synchronous operation of variable speed drives having active converters include extending the synchronous operation of an active converter to the AC mains voltage during complete line dropout. A phase angle control circuit includes a squaring amplifier, a first phase-lock loop circuit associated and a second phase-lock loop circuit. The squaring amplifier receives the AC power source and outputs a rectangular output signal to a pair of phase lock loop (PLL) circuits. The first PLL circuit with a first lag-lead filter is configured with a high cutoff frequency to provide the converter stage with a phase angle parameter; and the second phase-lock loop circuit including a second lag-lead filter configured to have a low cutoff frequency to provide the lag-lead filter the capability of storing the phase angle of the mains voltage during mains interruption.
4 Citations
15 Claims
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1. A variable speed drive system configured to receive an input AC voltage at a fixed AC input voltage and provide an output AC power at a variable voltage and variable frequency, the variable speed drive comprising:
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a converter stage connected to an AC power source providing the input AC voltage, the converter stage being configured to convert the input AC voltage to a boosted DC voltage; a DC link connected to the converter stage, the DC link being configured to filter and store the boosted DC voltage from the converter stage; and an inverter stage connected to the DC link, the inverter stage being configured to convert the boosted DC voltage from the DC link into the output AC power having the variable voltage and the variable frequency; and a phase angle control circuit comprising; a squaring amplifier, a first phase-lock loop circuit associated and a second phase-lock loop circuit; the squaring amplifier configured to receive the AC power source and output a a substantially rectangular output signal based on the AC power source; the first phase-lock loop circuit including a first lag-lead filter configure to have a high filter cutoff frequency and a first capacitor to provides the converter stage with a phase angle parameter; and the second phase-lock loop circuit including a second lag-lead filter configured to have a low cutoff frequency and a second capacitor to provide the lag-lead filter the capability of storing an angle of the mains voltage in the feedback loop of the PLL during mains interruption. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. The position of the each analog switch of the first and second phase lock loop further including a mains voltage detector circuit controlled by sensing a loss of the AC power source input AC voltage.
- 10. Each PLL having a phase detector circuit, a VCO and a divide by N circuit, the phase detector circuit having an out-of-lock detector responsive to a phase difference between the squaring amplifier square wave output and a comparison feedback signal generated by the divide by N counter in response to the voltage control oscillator.
Specification