Class D Analog-to-Digital Converter
First Claim
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1. An analog-to-digital converter (ADO) circuit, comprising:
- an ADC input node, a pulse-stream output node and N digital output nodes;
a modulated square wave converter (MSWC) connected between the ADC input node and pulse-stream output node;
a time to digital converter (TDC) connected between the pulse-stream output node and the N digital output nodes, where N is a number greater than one; and
the MSWC comprising a ramp signal generator operable to help establish a modulated pulse stream at the pulse-stream output node.
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Abstract
A new analog-to-digital (ADC) circuit and architecture and the corresponding method of implementation are provided. The analog input signal is converted into a modulated pulse stream such as by a pulse-width-modulation scheme. The time-duration width of the pulses are measured by a TDC (time-to-digital converter) and converted to a digital binary representation that is directly correlated with the voltage amplitude of the analog input signal. The circuit implementation is substantially free of switches and circuit issues such as associated with sigma-delta and switched-capacitor techniques for ADC'"'"'s.
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Citations
20 Claims
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1. An analog-to-digital converter (ADO) circuit, comprising:
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an ADC input node, a pulse-stream output node and N digital output nodes; a modulated square wave converter (MSWC) connected between the ADC input node and pulse-stream output node; a time to digital converter (TDC) connected between the pulse-stream output node and the N digital output nodes, where N is a number greater than one; and the MSWC comprising a ramp signal generator operable to help establish a modulated pulse stream at the pulse-stream output node. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An analog-to-digital converter (ADC) circuit, comprising:
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differential ADC input nodes, a pulse-stream output node and N digital output nodes; a modulated square wave converter (MSWC) connected between the ADC input node and pulse-stream output node; a time to digital converter (TDC) connected between the pulse-stream output node and the N digital output nodes, where N is a number greater than one; and the MSWC comprising a ramp signal generator operable to help establish a modulated pulse stream at the pulse-stream output node. - View Dependent Claims (8, 9, 10, 11, 12, 14, 15)
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13. The ADC circuit of claim 13 wherein the logic circuit has a pair of logic feedback nodes and the integrator circuit has a pair of amplifier input nodes;
- and the MSWC further comprises a pair of feedback circuits, each between a pairing of the logic feedback node and the amplifier input node.
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16. A method to convert an analog signal into digital form comprises the steps of:
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generating a ramp signal; converting the analog signal to a modulated pulse wave; and providing a counter with pulses from an oscillator and with said modulated pulse wave, the counter producing N digital bits, where N is a number greater than one. - View Dependent Claims (17, 18, 19)
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20. An analog-to-digital converter (ADC) circuit, comprising:
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an ADC input node, a pulse-stream output node and N digital output nodes; a modulated square wave converter (MSWC) connected between the ADC input node and pulse-stream output node; a time to digital converter (TDC) connected between the pulse-stream output node and the N digital output nodes, where N is a number greater than one; and the MSWC and TDC both responsive to a same master clock signal, wherein the MSWC is operable to generate a modulated pulse stream at the pulse-stream output node.
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Specification