Method for fabricating polysilicon layer with large and uniform grains

• US 20080182392A1
• Filed: 01/29/2008
• Published: 07/31/2008
• Est. Priority Date: 01/29/2007
• Status: Abandoned Application

• Current Assignee: InnoLux Corporation
• Original Assignee: Innolux Display Corporation (InnoLux Corporation)
• Inventors: Huang, Jung-Lung, Yeh, Guan-Hua, Wu, Hong-Gi
• Application Number:
  US12/011,804
• Publication Number:
  US 20080182392A1
• Time in Patent Office: Days
• US Class Current: 438/486
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 21/02675 using laser beams

Abstract

An exemplary method for fabricating a polysilicon layer (208) includes the following steps. A substrate (200) is provided, and a first amorphous silicon layer (203) is formed over the substrate. Portions of the first amorphous silicon layer are removed through a photolithograph process to form a plurality of crystallization seeds (205). A second amorphous silicon layer (206) is formed over the substrate and the crystallization seeds. A laser annealing process is conducted to crystallize the amorphous silicon layer into a polysilicon layer.

Claims

1. A method for fabricating a polysilicon layer, the method comprising:

providing a substrate, and forming a first amorphous silicon layer over the substrate;

removing portions of the first amorphous silicon layer to form a plurality of crystallization seeds through a photolithographic process;

forming a second amorphous silicon layer over the substrate, the second amorphous silicon layer covering the crystallization seeds; and

conducting a laser annealing process to crystallize the amorphous silicon layer into a polysilicon layer.

2. The method for fabricating a polysilicon layer as claimed in claim 1, wherein the portions of the first amorphous silicon layer are removed via a dry etching process.

3. The method for fabricating a polysilicon layer as claimed in claim 2, wherein an etchant of the dry etching process is a mixture of sulfur hexafluoride and carbon tetrafluoride.

4. The method for fabricating a polysilicon layer as claimed in claim 1, wherein the portions of the first amorphous silicon layer are removed via a wet etching process.

5. The method for fabricating a polysilicon layer as claimed in claim 4, wherein an etchant of the wet etching process is an aqueous solution of nitric acid and ammonium fluoride.

6. The method for fabricating a polysilicon layer as claimed in claim 1, wherein each two adjacent crystallization seeds are spaced apart a distance in the range from 0.5 micrometers-to 3 micrometers.

7. The method for fabricating a polysilicon layer as claimed in claim 6, wherein each two adjacent crystallization seeds are spaced apart a distance of 2 micrometers.

8. The method for fabricating a polysilicon layer as claimed in claim 1, wherein the substrate is a glass substrate.

9. The method for fabricating a polysilicon layer as claimed in claim 1, wherein the first and second amorphous silicon layers are each formed by a process selected from the group consisting of vacuum evaporation, sputtering, low pressure chemical vapor deposition, and plasma enhanced chemical vapor deposition.

10. The method for fabricating a polysilicon layer as claimed in claim 1, further comprising, before forming the first amorphous silicon layer, forming a buffer layer on the substrate, with the first amorphous silicon layer being subsequently formed on the buffer layer.

11. The method for fabricating a polysilicon layer as claimed in claim 10, wherein the buffer layer is one of a silicon oxide layer and a silicon nitride layer.

12. The method for fabricating a polysilicon layer as claimed in claim 10, wherein the buffer layer is a multilayer having at least one silicon nitride layer and at least one silicon oxide layer.

13. The method for fabricating a polysilicon layer as claimed in claim 1, further comprising planarizing the polysilicon layer.

14. The method for fabricating a polysilicon layer as claimed in claim 13, wherein the polysilicon layer is planarized by a process selected from the group consisting of plasma etching, chemical mechanical polishing, chemical wet etching, and excimer laser annealing.

15. A method for fabricating a polysilicon layer, the method comprising:

providing a substrate, and forming a first amorphous silicon layer over the substrate;

etching the first amorphous silicon layer to form a plurality of silicon particles;

forming a second amorphous silicon layer over the substrate, the second amorphous silicon layer covering the silicon particles; and

melting the second amorphous silicon layer and crystallizing the melted silicon into a polysilicon layer, wherein the silicon particles act as crystallization seeds.

16. The method for fabricating a polysilicon layer as claimed in claim 15, wherein the silicon particles are formed through a photolithographic process.

17. The method for fabricating a polysilicon layer as claimed in claim 15, wherein the second amorphous silicon layer is crystallized through an excimer laser annealing process.

18. The method for fabricating a polysilicon layer as claimed in claim 15, further comprising, before forming the first amorphous silicon layer, forming a buffer layer on the substrate, with the first amorphous silicon layer being subsequently formed on the buffer layer.

19. The method for fabricating a polysilicon layer as claimed in claim 15, further comprising planarizing the polysilicon layer.