Integrated Circuit and Method for Monitoring and Controlling Power and for Detecting Open Load State
First Claim
1. A method for identifying an open circuit state at an output port configured to provide power to an electrical device coupled to the output port, comprising:
- (1) storing a minimum open circuit current value of the output port in a memory, the minimum open circuit current value being based on a hardware characteristic of the output port;
(2) measuring the steady state current at the output port for a selected number of times at selected time intervals;
(3) storing the measured steady state current values in the memory;
(4) selecting a subset of the steady state current values;
(5) calculating an average of the subset of the steady state current values;
(6) comparing the average current value to the minimum open circuit current value; and
(7) identifying the open circuit state at the output port based on the comparison.
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Accused Products
Abstract
An integrated circuit and method for monitoring and controlling power and for identifying an open circuit state at an output port is disclosed. A minimum open circuit current value of the output port is known. A steady state current at the output port is measured for a selected number of times at selected time intervals. A subset of the steady state current values are selected and an average current value is calculated. The average current value is compared to the minimum open circuit current value (if no loads detected) or to a learned open circuit current value (if a load or trailer is detected). A possible open circuit state at the output port is reported based on the comparison.
32 Citations
27 Claims
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1. A method for identifying an open circuit state at an output port configured to provide power to an electrical device coupled to the output port, comprising:
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(1) storing a minimum open circuit current value of the output port in a memory, the minimum open circuit current value being based on a hardware characteristic of the output port; (2) measuring the steady state current at the output port for a selected number of times at selected time intervals; (3) storing the measured steady state current values in the memory; (4) selecting a subset of the steady state current values; (5) calculating an average of the subset of the steady state current values; (6) comparing the average current value to the minimum open circuit current value; and (7) identifying the open circuit state at the output port based on the comparison. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for identifying an open circuit state at one of a plurality of output ports each configured to provide power to an electrical device, the method comprising:
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(1) determining a learned open circuit current value of the output port, the learned open circuit current value being based on a plurality of measured steady state learn-phase load currents at the output port; (2) storing the learned open circuit current value in a memory; (3) measuring the steady state current at the output port for a selected number of times at selected time intervals; (4) storing the measured steady state current values in the memory; (5) selecting, by a processor, a subset of the steady state current values; (6) calculating, by the processor, an average of the subset of the steady state current values; (7) comparing the average current value to the learned open circuit current value; and (8) identifying the open circuit state based on the comparison. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An integrated circuit device for monitoring and controlling an output port adapted to provide electrical power to a load, the integrated circuit device identifying an open circuit state at the output port, comprising:
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a memory; a processor electrically coupled to the memory, the processor storing data in, and receiving data from, the memory; a switched power control circuit electrically coupled to the load, the switched power control circuit controlling the electrical power delivered to the load by varying a duty cycle responsive to a power control signal received from the processor; a current sense circuit electrically coupled to measure current flowing to the load and providing a current sense signal representative of the measured current to the processor, the current sense circuit providing an open circuit state signal to the processor when the measured current is less than a minimum open circuit current; and the processor storing data representative of the current sense signal in the memory, the processor providing the power control signal to the switched power control circuit responsive to the current sense signal, the processor reporting the open circuit state responsive to the open circuit signal. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A integrated circuit device for monitoring and controlling a plurality of output ports each adapted to provide electrical power to a respective load, the integrated circuit identifying an open circuit state at one of the output ports, comprising:
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a memory; a processor electrically coupled to the memory, the processor storing data in, and receiving data from, the memory; a plurality of switched power control circuits each electrically coupled to a respective load, the switched power control circuit controlling the electrical power delivered to the load by varying a duty cycle responsive to a power control signal from the processor; a plurality of current sense circuits each electrically coupled to a respective load, the current sense circuit measuring the current flowing through the load and providing a current sense signal representative of the measured current to the processor; and the processor storing data representative of the current sense signal in the memory, the processor providing the power control signal to the switched power control circuit responsive to the current sense signal, the processor including (a) a learn operating mode which calculates a learned open circuit current value at the output port based on a plurality of current sense signals during a learning stage, and (b) a monitoring mode which calculates an average current value at the output port based on a plurality of current sense signals during a steady state, the processor reporting an open circuit state at the output port responsive to a comparison of the average current value to the learned open circuit current value. - View Dependent Claims (23, 24, 25, 26, 27)
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Specification