Power Converter Apparatus and Methods Using Neutral Coupling Circuits with Interleaved Operation

• US 20080239775A1
• Filed: 03/27/2007
• Published: 10/02/2008
• Est. Priority Date: 03/27/2007
• Status: Active Grant

• Current Assignee: Eaton Intelligent Power Limited (Eaton Corporation PLC.)
• Original Assignee: Eaton Power Quality Corporation (Eaton Corporation PLC.)
• Inventors: Pfitzer, Hans-Erik, Oughton, George W.
• Granted Patent: US 7,800,924 B2
• Time in Patent Office: Days
• US Class Current: 363/134
• CPC Class Codes: H02M 1/0043 Converters switched with a phase shift, i.e. interleaved non-isolated DC/DC converters H02M3/1586
• CPC Class Codes: H02M 1/123 Suppression of common mode voltage or current
• CPC Class Codes: H02M 5/4585 having a rectifier with controlled elements
• CPC Class Codes: H02M 7/493 the static converters being arranged for operation in parallel

Abstract

A power converter apparatus, such as an uninterruptible power supply (UPS), includes an inverter having an input coupled to a first DC bus and a second DC bus and configured to generate an AC output with respect to a neutral terminal at a phase output terminal thereof. The apparatus further includes first and second neutral coupling circuits, each configured to selectively couple the first DC bus and the second DC bus to the neutral terminal, and a control circuit configured to cause interleaved operation of the neutral coupling circuits.

Claims

1. A power converter apparatus comprising:

an inverter having an input coupled to a first DC bus and a second DC bus and configured to generate an AC output with respect to a neutral terminal at a phase output terminal;

first and second neutral coupling circuits, each configured to selectively couple the first DC bus and the second DC bus to the neutral terminal; and

a control circuit configured to cause interleaved operation of the neutral coupling circuits.

2. The apparatus of claim 1, wherein the control circuit is configured to operate the neutral coupling circuits to shift a voltage range between the first DC bus and the second DC bus with respect to the neutral terminal.

3. The apparatus of claim 1, wherein the control circuit comprises:

a pulse width modulation circuit configured to generate a pulse train signal; and

a drive circuit configured to drive respective ones of the neutral coupling circuits responsive to respective interleaved sets of pulses of the pulse train signal.

4. The apparatus of claim 3, wherein the pulse train signal comprises a first pulse train signal and wherein the drive circuit comprises:

a pulse separation circuit configured to generate second and third pulse train signals comprising respective trains of pulses corresponding to respective ones of the interleaved sets of pulses; and

respective first and second drive circuits that drive respective ones of the neutral coupling circuits responsive to respective ones of the second and third pulse train signals.

5. The apparatus of claim 4, wherein a frequency of the first pulse train signal is two or more times greater than a frequency of the second and third pulse train signals.

6. The apparatus of claim 4, wherein the pulses of the second and third pulse train signals have pulse widths that are integer multiples of pulse widths of the corresponding pulses of the first pulse train signal.

7. The apparatus of claim 1, wherein the inverter comprises first and second parallel-connected phase coupling circuits configured to selectively couple the first DC bus and the second DC bus to the phase output terminal in an interleaved manner.

8. An uninterruptible power supply (UPS), comprising:

a phase output terminal;

a neutral terminal;

a first DC bus and the second DC bus;

a common mode inductor having a first terminal coupled to one of the first DC bus and the second DC bus and a second terminal configured to be coupled to a battery;

a filter capacitor coupled between the second terminal of the common mode inductor and the neutral terminal;

an inverter coupled to the first DC bus and second DC bus and configured to generate an AC output with respect to the neutral terminal at the phase output terminal;

first and second neutral coupling circuits coupled in parallel between the first DC bus and the second DC bus and each configured to selectively couple the first DC bus and the second DC bus to the neutral terminal; and

a control circuit configured to cause interleaved operation of the neutral coupling circuits.

9. The UPS of claim 8, wherein the control circuit is configured to cause the neutral coupling circuits to shift a voltage range between the first DC bus and the second DC bus with respect to the neutral terminal.

10. The UPS of claim 8, wherein the control circuit comprises:

a pulse width modulation circuit configured to generate a pulse train signal; and

a drive circuit configured to drive respective ones of the neutral coupling circuits responsive to respective interleaved sets of pulses of the pulse train signal.

11. The UPS of claim 10, wherein the pulse train signal comprises a first pulse train signal and wherein the drive circuit comprises:

a pulse separation circuit configured to generate second and third pulse train signals comprising respective first and second trains of pulses corresponding to respective ones of the interleaved sets of pulse; and

respective first and second drive circuits that drive respective ones of the neutral coupling circuits responsive to respective ones of the second and third pulse train signals.

12. The UPS of claim 11, wherein a frequency of the first pulse train signal is two or more times greater than a frequency of the second and third pulse train signals.

13. The UPS of claim 11, wherein the pulses of the second and third pulse train signals have pulse widths that are integer multiples of the pulse widths of the corresponding pulses of the first pulse train signal.

14. The UPS of claim 8:

wherein the common node inductor comprises;

a first common mode inductor configured to be coupled between the first DC bus and a first terminal of the battery; and

a second common mode inductor configured to be coupled between the second DC bus and a second terminal of the battery; and

wherein the filter capacitor comprises;

a first filter capacitor coupled between the first common mode inductor and the neutral; and

a second filter capacitor coupled between the second common mode inductor and the neutral.

15. The UPS of claim 8, wherein the inverter comprises first and second parallel-connected phase coupling circuits configured to selectively couple the first DC bus and the second DC bus to the phase output terminal in an interleaved manner.

16. A method of operating a power conversion apparatus comprising an inverter coupled to first and second DC busses and configured to generate an AC output with respect to a neutral terminal at a phase output terminal, the method comprising:

providing first and second neutral coupling circuits, each configured to selectively couple the first DC bus and the second DC bus to a neutral terminal; and

interleaving operations of the first and second neutral coupling circuits while operating the inverter to generate the AC voltage with respect to the neutral terminal.

17. The method of claim 16, further comprising operating the neutral coupling circuits to cause a voltage range between the first DC bus and the second DC bus to shift with respect to the neutral terminal.

18. The method of claim 16, wherein interleaving operations of the first and second neutral coupling circuits while operating the inverter to generate the AC voltage with respect to the neutral terminal comprises:

generating a pulse train signal comprising a series of pulses having widths that vary responsive to a control variable; and

driving respective ones of the neutral coupling circuits responsive to respective interleaved sets of pulses of the pulse train signal.

19. The method of claim 18, wherein driving respective ones of the neutral coupling circuits responsive to respective interleaved sets of pulses of the pulse train signal comprises:

generating second and third pulse train signals comprising respective trains of pulses corresponding to respective ones of the interleaved sets of pulse; and

driving respective ones of the neutral coupling circuits responsive to respective ones of the second and third pulse train signals.

20. The method of claim 19, wherein a frequency of the first pulse train signal is two or more times greater than a frequency of the second and third pulse train signals.

21. The method of claim 19, wherein the pulses of the second and third pulse train signals have pulse widths that are a integer multiple of the pulse widths of the corresponding pulses of the first pulse train signal.