LIQUID CRYSTAL DISPLAY DEVICE

• US 20080284931A1
• Filed: 05/15/2008
• Published: 11/20/2008
• Est. Priority Date: 05/17/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KIMURA, Hajime
• Granted Patent: US 8,619,011 B2
• Time in Patent Office: Days
• US Class Current: 349/39
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2310/024 Scrolling of light from the illumination source over the display in combination with the scanning of the display screen
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2320/0252 Improving the response speed
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 2320/028 by changing the viewing angle properties, e.g. widening the viewing angle, adapting the viewing angle to the view direction
• CPC Class Codes: G09G 2320/0673 for control of gamma adjustment, e.g. selecting another gamma curve
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 2340/16 Determination of a pixel data signal depending on the signal applied in the previous frame
• CPC Class Codes: G09G 3/2025 the sub-frames having all the same time duration
• CPC Class Codes: G09G 3/342 using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

To provide a display device in which a viewing angle characteristic is improved by providing a plurality of sub-pixels to one pixel. Alternatively, to provide a display device in which an aperture ratio is suppressed even when a plurality of sub-pixels is provided. A pixel including first sub-pixel, a second sub-pixel, and a third sub-pixel, a scanning line, a signal line, a first capacitor wiring, a second capacitor wiring and a third capacitor wiring are provided. Pixel electrodes each electrically connected to one electrode of the first to third capacitor elements, and the first to third capacitor wirings, respectively, are provided to the first to third sub-pixels electrodes, respectively. Potentials of the first capacitor wiring and the second capacitor wiring are changed and a potential of the third capacitor wiring is kept almost constant.

Claims

1. A liquid crystal display device comprising:

a pixel including a first sub-pixel, a second sub-pixel, and a third sub-pixel,

a scanning line;

a signal line;

a first capacitor wiring;

a second capacitor wiring; and

a third capacitor wiring,

wherein the first sub-pixel includes a first pixel electrode, a first transistor, and a first capacitor element,

wherein a gate of the first transistor is electrically connected to the scanning line, one of source and drain of the first transistor is electrically connected to the signal line, and the other of source and drain of the first transistor is electrically connected to the first pixel electrode,

wherein a first electrode of the first capacitor element is electrically connected to the first capacitor wiring, and a second electrode of the first capacitor element is electrically connected to the first pixel electrode,

wherein the second sub-pixel includes a second pixel electrode, a second transistor, and a second capacitor element,

wherein a gate of the second transistor is electrically connected to the scanning line, one of source and drain of the second transistor is electrically connected to the signal line, and the other of source and drain of the second transistor is electrically connected to the second pixel electrode,

wherein a first electrode of the second capacitor element is electrically connected to the second capacitor wiring, and a second electrode of the second capacitor element is electrically connected to the second pixel electrode,

wherein the third sub-pixel includes a third pixel electrode, a third transistor, and a third capacitor element,

wherein a gate of the third transistor is electrically connected to the scanning line, one of source and drain of the third transistor is electrically connected to the signal line, and the other of source and drain of the third transistor is electrically connected to the third pixel electrode,

wherein a first electrode of the third capacitor element is electrically connected to the third capacitor wiring, and a second electrode of the third capacitor element is electrically connected to the third pixel electrode,

wherein potentials of the first capacitor wiring and the second capacitor wiring change, and

wherein a potential of the third capacitor wiring is almost constant.

2. The liquid crystal display device according to claim 1,

wherein a plurality of the pixels is provided;

and

wherein the first capacitor wiring, the second capacitor wiring, and the third capacitor wiring are provided to be shared between different pixels.

3. The liquid crystal display device according to claim 1, wherein the potentials of the first capacitor wiring and the second capacitor wiring change periodically and differ from each other by half a cycle.

4. A liquid crystal display device comprising:

a pixel including a first sub-pixel, a second sub-pixel, and a third sub-pixel;

a plurality of scanning lines including a first scanning line and a second scanning line which is different from the first scanning line;

a signal line;

a first capacitor wiring; and

a second capacitor wiring,

wherein the first sub-pixel includes a first pixel electrode, a first transistor, and a first capacitor element,

wherein a gate of the first transistor is electrically connected to the first scanning line, one of source and drain of the first transistor is electrically connected to the signal line, and the other of source and drain of the first transistor is electrically connected to the first pixel electrode,

wherein a first electrode of the first capacitor element is electrically connected to the first capacitor wiring, and a second electrode of the first capacitor element is electrically connected to the first pixel electrode,

wherein the second sub-pixel includes a second pixel electrode, a second transistor, and a second capacitor element,

wherein a gate of the second transistor is electrically connected to the first scanning line, one of source and drain of the second transistor is electrically connected to the signal line, and the other of source and drain of the second transistor is electrically connected to the second pixel electrode,

wherein a first electrode of the second capacitor element is electrically connected to the second capacitor wiring, and a second electrode of the second capacitor element is electrically connected to the second pixel electrode,

wherein the third sub-pixel includes a third pixel electrode, a third transistor, and a third capacitor element,

wherein a gate of the third transistor is electrically connected to the first scanning line, one of source and drain of the third transistor is electrically connected to the signal line, and the other of source and drain of the third transistor is electrically connected to the third pixel electrode,

wherein a first electrode of the third capacitor element is electrically connected to the second scanning line, and a second electrode of the third capacitor element is electrically connected to the third pixel electrode, and

wherein potentials of the first capacitor wiring and the second capacitor wiring change.

5. The liquid crystal display device according to claim 4,

wherein a plurality of the pixels is provided, and

wherein the first capacitor wiring and the second capacitor wiring are provided to be shared between different pixels.

6. The liquid crystal display device according to claim 4, wherein the potentials of the first capacitor wiring and the second capacitor wiring change periodically and differ from each other by half a cycle.

7. A liquid crystal display device comprising:

a pixel including a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel,

a scanning line;

a signal line;

a first capacitor wiring;

a second capacitor wiring;

a third capacitor wiring; and

a fourth capacitor wiring,

wherein the first sub-pixel includes a first pixel electrode, a first transistor, and a first capacitor element;

wherein a gate of the first transistor is electrically connected to the scanning line, one of source and drain of the first transistor is electrically connected to the signal line, and the other of source and drain of the first transistor is electrically connected to the first pixel electrode;

wherein a first electrode of the first capacitor element is electrically connected to the first capacitor wiring, and a second electrode of the first capacitor element is electrically connected to the first pixel electrode;

wherein the second sub-pixel includes a second pixel electrode, a second transistor, and a second capacitor element;

wherein a gate of the second transistor is electrically connected to the scanning line, one of source and drain of the second transistor is electrically connected to the signal line, and the other of source and drain of the second transistor is electrically connected to the second pixel electrode;

wherein a first electrode of the second capacitor element is electrically connected to the second capacitor wiring, and a second electrode of the second capacitor element is electrically connected to the second pixel electrode;

wherein the third sub-pixel includes a third pixel electrode, a third transistor, and a third capacitor element;

wherein a gate of the third transistor is electrically connected to the scanning line, one of source and drain of the third transistor is electrically connected to the signal line, and the other of source and drain of the third transistor is electrically connected to the third pixel electrode;

wherein a first electrode of the third capacitor element is electrically connected to the third capacitor wiring, and a second electrode of the third capacitor element is electrically connected to the third pixel electrode;

wherein the fourth sub-pixel includes a fourth pixel electrode, a fourth transistor, and a fourth capacitor element;

wherein a gate of the fourth transistor is electrically connected to the scanning line, one of source and drain of the fourth transistor is electrically connected to the signal line, and the other of source and drain of the fourth transistor is electrically connected to the fourth pixel electrode;

wherein a first electrode of the fourth capacitor element is electrically connected to the fourth capacitor wiring, and a second electrode of the fourth capacitor element is electrically connected to the fourth pixel electrode;

wherein potentials of the first capacitor wiring and the second capacitor wiring change; and

wherein potentials of the third capacitor wiring and the fourth capacitor wiring are almost constant.

8. The liquid crystal display device according to claim 7,

wherein the first sub-pixel and the second sub-pixel are provided with the scanning line interposed therebetween;

and

wherein the third sub-pixel and the fourth sub-pixel are provided with the scanning line interposed therebetween.

9. The liquid crystal display device according to claim 7, wherein the potentials of the first capacitor wiring and the second capacitor wiring change periodically and differ from each other by half a cycle.