Trench Gate Power Semiconductor Device

• US 20080315301A1
• Filed: 11/22/2005
• Published: 12/25/2008
• Est. Priority Date: 11/22/2005
• Status: Active Grant

• Current Assignee: Shindengen Electric Manufacturing Company Limited
• Original Assignee: Shindengen Electric Manufacturing Company Limited
• Inventors: Watanabe, Yuji, Oshima, Kunihito, Matsuyama, Kazushige, Sasaoka, Fuminori, Takemori, Toshiyuki, Itoi, Masato
• Granted Patent: US 7,939,886 B2
• Time in Patent Office: Days
• US Class Current: 257/331
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench gate power MOSFET (1) includes: an n⁻-type epitaxial layer (12); a p-type body region (20) formed in the vicinity of an upper surface of the n⁻-type epitaxial layer (12); a plurality of trenches (14) formed so as to reach the n⁻-type epitaxial layer (12) from an upper surface of the p-type body region (20); and gates (18) formed in the trenches (14). In some regions facing the p-type body region (20) in the n⁻-type epitaxial layer (12), p-type carrier extracting regions (26a, 26b, 26c) are formed. According to the trench gate power MOSFET (1), holes generated in a cell region can be effectively collected through the p-type carrier extracting regions (26a, 26b, 26c) so as to further increase a speed of the switching operation.

Claims

1. A trench gate power semiconductor device comprising:

a semiconductor layer of first conductive type;

a body region of second conductive type opposite to the first conductive type, the body region formed in the vicinity of an upper surface of the semiconductor layer of first conductive type;

a plurality of trenches formed so as to reach the semiconductor layer of first conductive type from an upper surface side of the body region of second conductive type; and

gates formed in the plurality of trenches, wherein

in some regions out of regions of the semiconductor layer of first conductive type facing the body region of second conductive type in an opposed manner, carrier extracting regions of second conductive type are formed.

2. A trench gate power semiconductor device according to claim 1, wherein the carrier extracting regions of second conductive type are formed such that the carrier extracting regions cover partial or whole regions of some trenches out of the plurality of trenches.

3. A trench gate power semiconductor device according to claim 2, wherein the carrier extracting region of second conductive type is formed such that the carrier extracting region covers a partial or whole region of the outermost trench out of the plurality of trenches.

4. A trench gate power semiconductor device according to claim 1, wherein the carrier extracting regions of second conductive type are formed in partial or whole regions of some inter-trench regions out of inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches.

5. A trench gate power semiconductor device according to claim 4, wherein the carrier extracting region of second conductive type is formed in a partial or whole region of the inter-trench region sandwiched between the outermost trench out of the plurality of trenches and the trench arranged close to the outermost trench.

6. A trench gate power semiconductor device according to claim 1, wherein the carrier extracting region of second conductive type is formed such that the carrier extracting region covers two neighboring trenches out of the plurality of trenches and an inter-trench region sandwiched between the two neighboring trenches.

7. A trench gate power semiconductor device according to claim 2, wherein the carrier extracting region of second conductive type is also formed in a peripheral region outside the outermost trench out of the plurality of trenches.

8. A trench gate power semiconductor device according to claim 7, wherein the carrier extracting region of second conductive type formed in the peripheral region is formed on a lower surface side of the body region of second conductive type.

9. A trench gate power semiconductor device according to claim 7, wherein the carrier extracting region of second conductive type formed in the peripheral region is formed such that the carrier extracting region covers a side surface of the body region of second conductive type.

10. A trench gate power semiconductor device according to claim 1, wherein the carrier extracting region of second conductive type is formed so as to reach a position of a depth larger than a depth of the trenches.

20. A trench gate power semiconductor device according to claim 1, wherein on a portion of the carrier extracting region of second conductive type which is brought into contact with the second trench, a contact layer for reducing contact resistance with the metal layer filled in the inside of the second trench is formed.

21. A trench gate power semiconductor device according to claim 1, wherein the trench gate power semiconductor device is a power MOSFET.

22. A trench gate power semiconductor device according to claim 1, wherein the trench gate power semiconductor device is an IGBT.

11. A trench gate power semiconductor device comprising:

a semiconductor layer of first conductive type;

a body region of second conductive type opposite to the first conductive type, the body region formed in the vicinity of an upper surface of the semiconductor layer of first conductive type;

a plurality of trenches formed so as to reach the semiconductor layer of first conductive type from an upper surface side of the body region of second conductive type; and

gates formed in the plurality of trenches, wherein

a second trench of a depth smaller than a depth of the body region of second conductive type and including a metal layer connected with an electrode different from a gate electrode out of electrodes formed on an upper surface of the semiconductor layer of first conductive type therein is formed in the body region of second conductive type, and

a carrier extracting region of second conductive type is formed on a lower surface of the second trench such that the carrier extracting region is connected to the metal layer and reaches the semiconductor layer of first conductive type.

12. A trench gate power semiconductor device according to claim 11, wherein the second trench is formed in all inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches.

13. A trench gate power semiconductor device according to claim 11, wherein the second trench is formed in some regions out of all inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches.

14. A trench gate power semiconductor device according to claim 11, wherein the second trench is formed in partial or whole regions of some inter-trench regions out of inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches.

15. A trench gate power semiconductor device according to claim 11, wherein the second trench is formed in a peripheral region further outside the outermost trench out of the plurality of trenches.

16. A trench gate power semiconductor device according to claim 12, wherein the second trench is formed in a peripheral region further outside the outermost trench out of the plurality of trenches.

17. A trench gate power semiconductor device according to claim 16, wherein the second trench formed in the peripheral region has a width larger than a width of the second trench formed in the inter-trench region.

18. A trench gate power semiconductor device according to claim 16, wherein the carrier extracting region of second conductive type formed in the peripheral region is formed so as to reach a position deeper than the carrier extracting region of second conductive type formed in the inter-trench region.

19. A trench gate power semiconductor device according to claim 11, wherein the carrier extracting region of second conductive type is formed so as to reach a position of a depth larger than a depth of the trench.