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METHODS AND SYSTEMS FOR COMPUTER AIDED DESIGN OF 3D INTEGRATED CIRCUITS

  • US 20090064058A1
  • Filed: 07/13/2006
  • Published: 03/05/2009
  • Est. Priority Date: 07/26/2005
  • Status: Active Grant
First Claim
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1. A method for defining a 3-D technology file structure, the method comprising the steps of:

  • providing an identifier for each one of at least two circuit levels, constituting at least two circuit level identifiers;

    providing for each one of said at least two circuit levels, an identifier for a 2-D technology file corresponding to said one of said at least two circuit levels;

    said identifier for the 2-D technology file comprising a pointer to the 2-D technology file; and

    providing a file structure comprisingsaid at least two circuit level identifiers;

    said identifier, for said each one of said at least two circuit levels, for the 2-D technology file corresponding to said one of said at least two circuit levels;

    providing, if a bond layer needs to be defined, an identifier for the bond layer disposed between said at least two circuit levels; and

    providing a list comprising said at least two circuit level identifiers and said identifier for said bond layer, if the bond layer needs to be defined, said at least two circuit level identifiers and said identifier for a bond layer being located in an order in which said at least two circuit levels and said bond layer are located in a 3-D device.

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