Method of fabricating vertical Devices using a metal support film

• US 20090072264A1
• Filed: 10/08/2008
• Published: 03/19/2009
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol
• Granted Patent: US 8,106,417 B2
• Time in Patent Office: Days
• US Class Current: 257/99
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/04 with a quantum effect structure or superlattice, e.g. tunnel junction
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/14 with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/42 Transparent materials
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/54 having a particular shape
• CPC Class Codes: H01L 33/60 Reflective elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/641 characterized by the materials
• CPC Class Codes: H01L 33/647 the elements conducting electric current to or from the semiconductor body

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal techniques. Trenches that define the boundaries of the individual devices are formed through the semiconductor layers and into the insulating substrate, beneficially by inductive coupled plasma reactive ion etching. A first support structure is attached to the semiconductor layers. The hard substrate is then removed, beneficially by laser lift off. A second supporting structure, preferably conductive, is substituted for the hard substrate and the first supporting structure is removed. Individual devices are then diced, beneficially by etching through the second supporting structure. A protective photo-resist layer can protect the semiconductor layers from the attachment of the first support structure. A conductive bottom contact (possibly reflective) can be inserted between the second supporting structure and the semiconductor layers.

Claims

1-61. -61. (canceled)

62. A vertical topology device, comprising:

an adhesion structure having a first surface and a second surface;

a metallic support layer on the first surface of the adhesion structure;

a reflective and transparent contact layer on the second surface of the adhesion structure;

a semiconductor device having a first surface and a second surface, wherein the reflective and transparent contact layer is located on the first surface of the semiconductor device; and

a second contact layer located on the second surface of the semiconductor device.

66. A vertical topology device, comprising:

a conductive adhesion structure have a first surface and a second surface;

a conductive thick film support formed on the first surface;

a semiconductive device having an upper electrical contact and located above the conductive adhesion structure; and

a reflective contact structure disposed between the conductive adhesion structure and the semiconductor device, wherein the reflective contact structure is in direct contact with the second surface of the conductive adhesion structure.

70. A vertical topology device, comprising:

a conductive adhesion structure have a first surface and a second surface;

a conductive thick film support formed on the first surface;

a semiconductive device having an upper electrical contact and located above the conductive adhesion structure; and

a reflective contact structure disposed between the conductive adhesion structure and the semiconductor device, wherein the reflective contact structure is in direct contact with the semiconductive device.

72. A vertical topology device, comprising:

a semiconductive device having an upper electrical contact;

a conductive adhesion structure formed on the semiconductive device; and

a conductive thick film support formed on the conductive adhesion structure, wherein the conductive adhesion structure supports the conductive thick film support.