GROUND FAULT DETECTION CIRCUIT FOR USE IN HIGH VOLTAGE MOTOR DRIVE APPLICATIONS

• US 20090102488A1
• Filed: 10/10/2008
• Published: 04/23/2009
• Est. Priority Date: 10/10/2007
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Giandalia, Marco, Respigo, Davide, Grasso, Massimo, Ruzza, Stefano, Morini, Sergio
• Granted Patent: US 8,013,612 B2
• Time in Patent Office: Days
• US Class Current: 324/509
• CPC Class Codes: G01R 31/34 Testing dynamo-electric machines
• CPC Class Codes: G01R 31/42 AC power supplies
• CPC Class Codes: G01R 31/52 Testing for short-circuits, leakage current or ground faults

Abstract

An integrated ground fault detection circuit in accordance with an embodiment of the present application includes a shunt resistor provided on a positive rail of a DC bus, a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition and a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver, and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.

Claims

1. An integrated ground fault detection circuit comprises:

a shunt resistor provided on a positive rail of a DC bus;

a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition; and

a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver, and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.

2. The integrated ground fault detection circuit of claim 1, wherein the high voltage pocket further comprises:

an operational amplifier connected to the shunt resistor such that the inverting input of the operation amplifier is connected to a source side of the shunt resistor and the non-inverting input is connected to the application side of the shunt resistor such that the output of the operational amplifier indicates a voltage drop across the shunt resistor; and

a comparator operable to compare the output of the operational amplifier with a threshold voltage and to provide the fault detection signal based on the comparison, wherein the fault detection signal indicates a fault condition when the output of the operational amplifier exceeds the threshold voltage.

3. The integrated ground fault detection circuit of claim 2, wherein the transmitter further comprises:

a first high voltage MOSFET including a first gate terminal connected to an output of the comparator; and

a second high voltage MOSFET including a second gate terminal connected to the output of the comparator,

wherein a first drain terminal and the first gate terminal of the first high voltage MOSFET and a second drain terminal and the second gate terminal of the second high voltage MOSFET are positioned in the transmitter and a first source terminal of the first high voltage MOSFET and a second source terminal of the high voltage MOSFET are positioned in the receiver such the voltage on the fist and second source terminal, respectively, is based on the output of the comparator.

4. The integrated ground fault detection circuit of claim 3, wherein the receiver further comprises a second comparator operable to compare the voltage at the first source terminal to the voltage on the second source terminal and to provide an output signal indicating of the fault condition to the logic unit.

5. The integrated ground fault detection circuit of claim 4, wherein the output of the second comparator indicates a fault condition when the voltage of the second source terminal is greater than that at the first source terminal.

6. The integrated ground fault detection circuit of claim 5, wherein the logic unit is a latch circuit that holds a value provided by the output of the second comparator until a reset signal is received.

7. The integrated circuit of claim 6, further comprising an nmos MOSFET device with a gate connected to the logic unit and drain terminal provided as an output terminal of the circuit.

8. The integrate circuit of claim 7, further comprising a start up circuit operable to provide a floating ground reference for use in the high voltage pocket.

9. The integrated circuit of claim 8, wherein the start up circuit provides feedback to maintain a desired value for the floating ground reference.

10. An integrated ground fault detection circuit for use in an inverter circuit connected to a motor comprises:

a shunt resistor provided on a positive rail of a DC bus used to power the motor;

a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit in at least one of the inverter circuit and the motor, and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition; and

a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.

11. The integrated ground fault detection circuit of claim 10, wherein the high voltage pocket further comprises:

an operation amplifier connected to the shunt resistor such that the inverting input of the operation amplifier is connected to a source side of the shunt resistor and the non-inverting input is connected to the motor side of the shunt resistor such that the output of the operational amplifier indicates a voltage drop across the shunt resistor; and

a comparator operable to compare the output of the operational amplifier with a threshold voltage and to provide the fault detection signal based on the comparison, wherein the fault detection signal indicates a fault condition when the output of the operational amplifier exceeds the threshold voltage.

12. The integrated ground fault detection circuit of claim 11, wherein the transmitter further comprises:

a first high voltage MOSFET including a first gate terminal connected to an output of the comparator; and

a second high voltage MOSFET including a second gate terminal connected to the output of the comparator,

wherein a first drain terminal and the first gate terminal of the first high voltage MOSFET and a second drain terminal and the second gate terminal of the second high voltage MOSFET are positioned in the transmitter and a first source terminal of the first high voltage MOSFET and a second source terminal of the high voltage MOSFET are positioned in the receiver such the voltage on the fist and second source terminal, respectively, is based on the output of the comparator.

13. The integrated ground fault detection circuit of claim 12, wherein the receiver further comprises a second comparator operable to compare the voltage at the first source terminal to the voltage on the second source terminal and to provide an output signal indicate of the fault condition to the logic unit.

14. The integrated ground fault detection circuit of claim 13, wherein the output of the second comparator indicates a fault condition when the voltage of the second source terminal is greater than that at the first source terminal.

15. The integrated ground fault detection circuit of claim 14, wherein the logic unit is a latch circuit that holds a value provided by the output of the second comparator until a rest signal is received.

16. The integrated ground fault detection circuit of claim 15, further comprising an nmos MOSFET device with a gate connected to the logic unit and drain terminal provided as an output terminal of the circuit.

17. The integrated ground fault detection circuit of claim 16, further comprising a start up circuit operable to provide a floating ground reference for us in the high voltage pocket.

18. The integrated ground fault detection circuit of claim 17, wherein the start up circuit provides feedback to maintain a desired value for the floating ground reference.