Conditional batch buffer execution

• US 20090172676A1
• Filed: 12/31/2007
• Published: 07/02/2009
• Est. Priority Date: 12/31/2007
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Jiang, Hong, Gandhi, Wishwesh
• Granted Patent: US 8,522,242 B2
• Time in Patent Office: Days
• US Class Current: 718/101
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system

Abstract

A batch computer or batch processor may implement conditional execution at the command level of the batch processor or higher. Conditional execution may involve execution of one batch buffer depending on the results achieved upon execution by another batch buffer.

Claims

1. A method comprising:

providing for conditional execution at or above the batch buffer level of a batch processor.

2. The method of claim 1 including providing for conditional execution at the batch buffer level of a batch processor.

3. The method of claim 2 including providing code in a batch buffer of a batch processor to indicate what to do if a condition occurs.

4. The method of claim 3 including implementing conditional execution in a direct memory access command streamer.

5. The method of claim 2 including providing for conditional execution using a synchronization semaphore between two batch processing engines.

6. The method of claim 1 including providing for conditional execution above the batch buffer level of a batch processor.

7. The method of claim 6 including providing for conditional execution in a batch processor using a host computer.

8. The method of claim 7 including using a scheduler associated with an operating system to implement conditional execution of a batch buffer.

9. The method of claim 7 including using software in said host computer to provide a semaphore to indicate the result of execution in one batch buffer and to use that result to determine a batch buffer to execute next.

10. The method of claim 9 including providing for conditional execution between using a synchronization semaphore between two batch processing engines.

11. The method of claim 7 including using host computer software to intercept a decision from one batch buffer and to configure subsequent batch processing in response thereto.

12. The method of claim 1 including avoiding a frame delay due to conditional execution in a batch processor.

13. The method of claim 12 wherein avoiding a frame delay includes automatically performing a sequence in a given order before it is known whether or not the sequence is correct based on the occurrence of a condition and, if the sequence is incorrect based on the occurrence of the condition, overwriting the results with the correct answer.

14. The method of claim 1 including using hardware to provide conditional execution in a batch processor.

15. A batch processor comprising:

a controller;

a command ring buffer, coupled to said controller, including a plurality of batch buffers; and

said batch processor to provide conditional execution at or above the batch buffer level.

16. The batch processor of claim 15 wherein said batch processor is a graphics engine.

17. The batch processor of claim 15 wherein said controller is a direct memory access command streamer.

18. The batch processor of claim 17, said streamer to execute conditional execution at the command level of said command streamer.

19. The batch processor of claim 16 wherein at least one of said batch buffers includes code to indicate what to do upon the occurrence of a condition.

20. The batch processor of claim 19 wherein conditional execution is provided in response to a semaphore which signals the result of a task executed in one batch buffer to another batch buffer.

21. The batch processor of claim 20 including two batch processing engines that communicate using semaphore.

22. The batch processor of claim 15 including a device to overwrite the results of a sequence of executions by batch buffers if the sequence turns out to be incorrect based on a condition that is detected upon execution by one batch buffer.

23. A computer comprising:

a processor;

a memory coupled to said processor; and

a batch processing apparatus coupled to said processor, said batch processing apparatus including a plurality of batch buffers, said batch processing apparatus to provide conditional execution based upon the results of processing by one of said batch buffers.

24. The computer of claim 23 wherein said batch processing apparatus is a graphics engine.

25. The computer of claim 23 wherein said batch processing apparatus includes a controller and conditional execution is implemented at the command level of said controller.

26. The computer of claim 23 wherein said batch processing apparatus to conditionally execute using the processor.

27. The computer of claim 26 wherein said memory stores an operating system and said operating system is executable to provide conditional execution in said batch processing apparatus.

28. The computer of claim 23 including software stored in said memory, said software being the executable to overwrite the results of a sequence of executions by said batch buffers if the sequence turns out to be incorrect based on a condition that is detected upon execution by one batch buffer.

29. The computer of claim 23 wherein said computer provides semaphore between a pair of batch buffers to enable one batch buffer to indicate to another batch buffer the result of execution in the one batch buffer.

30. The computer of claim 29 including a plurality of batch processing apparatus that communicate with one another using a semaphore.