Mirror processor for display device

• US 20090179918A1
• Filed: 06/23/2008
• Published: 07/16/2009
• Est. Priority Date: 01/15/2008
• Status: Abandoned Application

• Current Assignee: TenEx Technologies, LLC
• Original Assignee: TenEx Technologies, LLC
• Inventors: Hsu, Lung-Teng, Lai, Siao-Huei
• Application Number:
  US12/213,633
• Publication Number:
  US 20090179918A1
• Time in Patent Office: Days
• US Class Current: 345/629
• CPC Class Codes: G01S 13/931 of land vehicles
• CPC Class Codes: G01S 2013/9314 Parking operations
• CPC Class Codes: G01S 7/04 Display arrangements
• CPC Class Codes: G06F 3/14 Digital output to display device ; Cooperation and interconnection of the display device with other functional units
• CPC Class Codes: G09G 2340/0492 Change of orientation of the displayed image, e.g. upside-down, mirrored
• CPC Class Codes: G09G 2340/10 Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
• CPC Class Codes: G09G 2340/12 Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
• CPC Class Codes: G09G 5/00 Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators image data processing or generation, in general G06T

Abstract

The mirror processor for display device of this invention comprises: A first input interface to receive a first image; a second input interface to receive a second image; an image decoding unit to convert said first and second images into a digital format; a memory unit to temporarily store at least said digitized first image; and an image processing unit to mirror said second image to generate a mirror image of said second image, to obtain said digitized first image from said memory unit and to superpose said digitized first image and said mirror image of said second image to form a synthetic image.

Claims

1. A mirror processor for display device, comprising:

a first input interface to receive a first image;

a second input interface to receive a second image;

an image decoding unit to convert said first and second images into a digital format;

a memory unit to temporarily store at least said digitized first image; and

an image processing unit to mirror said second image to generate a mirror image of said second image, to obtain said digitized first image from said memory unit, and to superpose said digitized first image and said mirror image of said second image to form a synthetic image.

2. The mirror processor for display device according to claim 1, wherein said image processing unit mirrors said digitized second image along its vertical axis.

3. The mirror processor for display device according to claim 1, wherein said image processing unit mirrors said digitized second image along its horizontal axis.

4. The mirror processor for display device according to claim 1, wherein said image processing unit comprises a mirror image generating circuit, a control circuit and an image superposing circuit;

wherein said mirror image generating circuit mirrors said digitized second image to generate a mirror image of said second image;

said control circuit stores said digitized image in said memory unit and restores said digitized first image into said image processing unit; and

said image superposing circuit superposes said digitized first image and said mirror image of said second image to form said synthetic image.

5. The mirror processor for display device according to claim 1, wherein said control circuit comprises a scaling circuit and an image penetration circuit;

wherein said scaling circuit scales the size of said second image and wherein said image penetration circuit defines said digitized first image or said mirror image of said second image as semitransparent.

6. The mirror processor for display device according to claim 1, further comprising an output interface to output said synthetic image to a display unit.

7. The mirror processor for display device according to claim 6, wherein said output interface is an RBG output display interface.

8. The mirror processor for display device according to claim 1, wherein said first input interface is one selected from the group consisted of the S-video interface, the DVBS interface, the YCbCr interface or the YPbPr interface.

9. The mirror processor for display device according to claim 1, wherein said second input interface is one selected from the group consisted of the S-video interface, the DVBS interface, the YCbCr interface or the YPbPr interface.

10. The mirror processor for display device according to claim 1, further comprising an image sensing element to capture peripheral images and to provide said captured images to said second input interface as said second image.

11. The mirror processor for display device according to claim 10, further comprising a digital multimedia module to receive multimedia images and to provide said received images to said first input interface as said first image.

12. The mirror processor for display device according to claim 1, further comprising a GPS receiver to receive GPS information, to generate GPS images according to said received GPS information and to provide said generated images to said first input interface as said first image.