Integrated Circuit That Uses A Dynamic Characteristic Of The Circuit

• US 20090222672A1
• Filed: 01/29/2009
• Published: 09/03/2009
• Est. Priority Date: 04/16/2002
• Status: Active Grant

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Clarke, Dwaine, Van Dijk, Marten, Devadas, Srinivas, Gassend, Blaise
• Granted Patent: US 7,904,731 B2
• Time in Patent Office: Days
• US Class Current: 713/189
• CPC Class Codes: G06F 21/31 User authentication
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/73 by creating or determining hardware identification, e.g. serial numbers
• CPC Class Codes: G06F 21/77 in smart cards
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G06F 2221/2103 Challenge-response
• CPC Class Codes: G06F 2221/2121 Chip on media, e.g. a disk or tape with a chip embedded in its case
• CPC Class Codes: G06F 2221/2129 Authenticate client device independently of the user
• CPC Class Codes: G06F 2221/2153 Using hardware token as a secondary aspect
• CPC Class Codes: G06Q 20/3674 involving authentication
• CPC Class Codes: G09C 1/00 Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system cryptographic typewriters G09C3/00
• CPC Class Codes: H01L 2223/54433 containing identification or tracking information
• CPC Class Codes: H01L 2223/5444 for electrical read out
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 23/576 using active circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04L 2209/34 Encoding or coding, e.g. Huffman coding or error correction
• CPC Class Codes: H04L 2209/42 : Anonymization, e.g. involving pseudonyms
• CPC Class Codes: H04L 9/0897 : involving additional devices, e.g. trusted platform module [TPM], smartcard or USB
• CPC Class Codes: H04L 9/3278 : using physically unclonable functions [PUF]

Abstract

An integrated circuit has a first component that has a dynamic characteristic that varies among like integrated circuits, for example, among integrated circuits fabricated using the same lithography mask. Operating the first component produces an output that is dependent on the dynamic characteristic of the first component. A digital value associated with the integrated circuit is generated using the output of the first component, and then the generated digital value is used in operation of the integrated circuit.

Claims

1. A method for operating an integrated circuit comprising:

operating a first component of the integrated circuit having a dynamic characteristic that varies among like integrated circuits, including producing an output of the first component dependent on the dynamic characteristic of the first component;

generating a digital value associated with the integrated circuit using the output of the first component; and

using the generated digital value in operation of the integrated circuit.

2. The method of claim 1 wherein the first component comprises a logic circuit.

3. The method of claim 2 wherein the logic circuit comprises a ring oscillator.

4. The method of claim 3 wherein the dynamic characteristic of the output comprises an oscillation rate of the ring oscillator.

5. The method of claim 1 wherein the first component comprises an oscillator circuit and the dynamic characteristic comprises an oscillation rate of the oscillator circuit.

6. The method of claim 1 wherein the first component comprises a signal path, and the dynamic characteristic of the first component comprises a signal delay of the signal path.

7. The method of claim 1 wherein using the generated digital value comprises identifying the IC.

8. The method of claim 1 wherein using the generated digital value comprises authenticating the IC.

9. The method of claim 1 wherein using the generated digital value comprises performing cryptographic operations in the IC.

10. The method of claim 1 further comprising limiting disclosure of the generated digital value outside the integrated circuit.

21. The method of claim 6 wherein the signal path includes a path through a plurality of logic gates.

22. The method of claim 6 wherein the signal path includes a passive transmission line.

11. An integrated circuit comprising:

a first component comprising circuitry that has a dynamic characteristic that varies among like integrated circuits, and having an output that is dependent on the dynamic characteristic of the first component;

a second component that accepts the output of the first component and produces a digital value associated with the integrated circuit; and

a functional component that operates according to the digital value produced by the second component.

12. The integrated circuit of claim 11 wherein the first component comprises a logic circuit.

13. The integrated circuit of claim 12 wherein the logic circuit comprises a ring oscillator.

14. The integrated circuit of claim 13 wherein the dynamic characteristic of the output comprises an oscillation rate of the ring oscillator.

15. The integrated circuit of claim 11 wherein the first component comprises an oscillator circuit and the dynamic characteristic depends on an oscillation rate of the oscillator circuit.

16. The integrated circuit of claim 11 wherein the first component comprises a signal path, and the dynamic characteristic of the first component comprises a signal delay of the signal path.

17. The integrated circuit of claim 11 wherein the functional component comprises an authentication component that operates according to the digital value produced by the second component.

18. The integrated circuit of claim 11 wherein the functional component comprises a cryptographic component that operates according to the digital value produced by the second component.

19. The integrated circuit of claim 11 further comprising a communication path linking the second component and the functional component for passing the generated digital value without disclosure outside the integrated circuit.

20. A method for producing a plurality of integrated circuits comprising:

fabricating each of the plurality of integrated circuits according to a common design, including forming

a first component comprising circuitry that has a dynamic characteristic that varies among the plurality of integrated circuits, and having an output that is dependent on the dynamic characteristic of the first component,

a second component that accepts the output of the first component and produces a digital value associated with the integrated circuit, and

a functional component that operates according to the digital value produced by the second component.

23. An apparatus comprising:

a device selected from a group of devices fabricated based on a common design, each device in the group having a corresponding plurality of measurable characteristics that is unique in the group to that device, the device including a measuring component that measures a selected characteristic.

24. The apparatus of claim 23, further comprising:

a storage device to store identifiers and responses associated with the device, each identifier identifying one or more measurable characteristics, each response corresponding to one or more identifiers and is derived from one or more measurements of the measurable characteristics identified by the one or more identifiers.

25. Circuitry for implementing a device-specific function comprising:

a plurality of circuit components, at least some of the circuit components having characteristics that vary among instances of fabrication of the circuitry;

selection circuitry for selecting one or more of the circuit components according to an input to the circuitry to form at least two signal paths through the circuit components; and

measurement circuitry responsive to variation in a dynamic characteristic among the at least two signal paths.

26. The circuitry of claim 25 wherein the plurality of circuit components comprises a plurality of separate delay paths, and the selection circuitry comprises switches configured to couple the separate delay paths according to the input to form the at least two signal paths.

27. The circuitry of claim 26 wherein at least some of the separate delay paths each comprises one or more active elements.

28. The circuitry of claim 25 wherein the separate delay paths comprise at least 64 separate delay paths and the selection circuitry is configured to select from among at least 2³² different signal paths formable from the at least 64 separate delay paths.

29. The circuitry of claim 25 wherein the measurement circuitry comprises an arbiter circuit responsive to variations in delay among the at least two signal paths.

30. Circuitry for implementing a device-specific function comprising:

a plurality of circuit components, at least some of the circuit components having characteristics that vary among instances of fabrication of the circuitry;

selection circuitry for selecting one or more of the circuit components according to an input to the circuitry to form one or more signal paths through the circuit components; and

measurement circuitry responsive to a delay characteristic of the formed one or more signal path.

31. The circuitry of claim 30 wherein the circuit components comprise separate delay paths, and the selection circuitry comprises switches configured to couple the separate delay paths according to the input to form the one or more signal paths.

32. The circuitry of claim 30 wherein the measurement circuitry comprises an oscillator circuit whose dynamic characteristic depends on the delay characteristic of the formed one or more signal path.

33. The circuitry of claim 32 wherein an oscillation frequency of the oscillator circuit depends on a delay of at least one of the formed signal paths.

34. The circuitry of claim 30 wherein the measurement circuitry comprises a plurality of oscillator circuits, each oscillator circuit having a dynamic characteristic that depends on the delay characteristic of a corresponding one of the formed one or more signal path.

35. The circuitry of claim 34 wherein the measurement circuitry is responsive to a variation in oscillation frequency among the plurality of oscillators.

36. An apparatus comprising:

a device selected from a group of devices fabricated based on a common design, each device in the group having a corresponding plurality of measurable delay characteristics that is unique in the group to that device;

wherein the device includes a port for accepting selection information and a measuring component for measurement one or more characteristics selected from amongst the plurality of measurable characteristics according to the accepted selection information.

37. The apparatus of claim 36 wherein the plurality of measurable characteristics include delay characteristics of a plurality of signal paths in the integrated circuit.

38. The apparatus of claim 37 wherein the plurality of signal paths include multiple paths through each of a set of circuit components.

39. The apparatus of claim 37 wherein the circuit components include one of passive transmission lines, or active semiconductor elements, and logic gates.

40. The apparatus of claim 37 wherein the measurement component includes an oscillator circuit whose oscillation characteristics depends on a delay characteristics of one or more of the signal paths.

41. The apparatus of claim 37 wherein the measurement component includes an arbiter circuit configured to compare delay characteristics of a plurality of the signal paths.

42. The apparatus of claim 36 wherein each of the plurality of measurable characteristics depends on a set of separate physical characteristics, and wherein selective measurement of one or more of the measurable characteristics includes forming a non-linear combination of a plurality of the separate physical characteristics according to selection information.

43. The apparatus of claim 42 wherein the separate physical characteristics include characteristics of circuit components, and combining the plurality of separate physical characteristics includes forming a delay path through the circuit components selected according to the selection information.

44. The apparatus of claim 42 wherein a result of combining of a plurality of separate characteristics is substantially unpredictable based on selective measurements of other combinations of the separate characteristics.

45. The apparatus of claim 36 wherein the device comprises an integrated circuit.

46. The apparatus of claim 36 wherein the integrated circuit comprises signal paths, and the plurality of measurable characteristics comprise the delay characteristics of the signal paths.

47. The apparatus of claim 36 wherein the integrated circuit comprises a set of circuit components, and the signal paths include paths through each of a set of the circuit components.