TRANSMITTER CHAIN TIMING AND TRANSMIT POWER CONTROL

• US 20090245417A1
• Filed: 11/10/2008
• Published: 10/01/2009
• Est. Priority Date: 03/29/2008
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Wang, Jibing, Kadous, Tamer A., George, Brian M.
• Granted Patent: US 8,385,465 B2
• Time in Patent Office: Days
• US Class Current: 375/297
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04

Abstract

In a communications system, transmitter power gain can be changed between symbols. A power gain change of a first part of a transmit chain is initiated a first time, whereas a power gain change of a second part of the transmit chain is initiated at a second time, such that the resulting power gain changes of the first and second parts both occur substantially within an inter-symbol time in a desired relationship to one another. In one example, the power gain change of the first part is initiated before the beginning of the inter-symbol time to account for expected serial bus latency between initiation and execution of the power gain change of the first part. The power gain change of the second part is initiated during the inter-symbol time such that overall power does not exceed an amount (for example, a maximum permitted under a communication standard).

Claims

1. A method comprising:

(a) initiating a power gain change of first part of a transmit chain at a first time; and

(b) initiating a power gain change of a second part of the transmit chain at a second time, wherein the power gain change of (a) and the power gain change of (b) result in a transmit symbol-to-symbol power gain change.

2. The method of claim 1, wherein the symbol-to-symbol power gain change occurs substantially during an inter-symbol time between two adjacent symbols, wherein the first time and the second time are separated from one another by at least one quarter of the inter-symbol time.

3. The method of claim 2, wherein the first part of the transmit chain includes a driver amplifier of a first integrated circuit, and wherein the second part of the transmit chain includes a power amplifier of a second integrated circuit, and wherein the driver amplifier supplies a signal to the power amplifier.

4. The method of claim 2, wherein the initiating of the power gain change of (a) involves sending a power gain change command across a serial bus from a first integrated circuit to a second integrated circuit, wherein the first part of the transmit chain is a part of the second integrated circuit, and wherein the initiating of the power gain change of (b) involves sending a signal from the first integrated circuit to a third integrated circuit, wherein the second part of the transmit chain is a part of the third integrated circuit.

5. The method of claim 1, wherein the initiating of the power gain change of (a) occurs during a data communication portion of a first symbol, wherein an inter-symbol time separates the data communication portion of the first symbol and a data communication portion of a second symbol, wherein the transmit symbol-to-symbol power gain change is a power gain change from the first symbol to the second symbol, and wherein the initiating of the power gain change of (b) occurs during the inter-symbol time.

6. The method of claim 2, wherein a processor executing a set of processor-executable instructions performs the initiating of (a) and performs the initiating of (b).

7. The method of claim 2, wherein a processor executing a set of processor-executable instructions performs the initiating of (a) by writing a value into a serial bus interface circuit, and wherein the processor performs the initiating of (b) without writing any value into the serial bus interface circuit.

8. The method of claim 2, wherein the transmit chain includes a digital-to-analog converter (DAC), a baseband filter, a mixer, a driver amplifier, and a power amplifier.

9. A method comprising:

(a) sending a first communication across a serial bus from a first integrated circuit to a second integrated circuit such that a power gain of a first part of a transmit chain in the second integrated circuit is changed, wherein the sending of (a) occurs before an inter-symbol time; and

(b) sending a second communication from the first integrated circuit to a third integrated circuit such that a power gain of a second part of the transmit chain in the third integrated circuit is changed, wherein the second communication is sent in (b) during the inter-symbol time, and wherein both the power gain change of (a) and the power gain change of (b) occur substantially within the inter-symbol time.

10. The method of claim 9, wherein the inter-symbol time is a time between a data communication portion of a first OFDM symbol and a data communication of a second adjacent OFDM symbol.

11. The method of claim 10, wherein the second part of the transmit chain is a power amplifier.

12. The method of claim 11, wherein a processor executing a set of processor-executable instructions initiates the sending of (a) before the inter-symbol time, and wherein the processor initiates the sending of (b) during the inter-symbol time.

13. The method of claim 12, wherein the processor initiates the sending of (a) by writing a value into a serial bus interface circuit of the first integrated circuit, and wherein the processor initiates the sending of (b) without writing any value into the serial bus interface circuit of the first integrated circuit.

14. An apparatus, comprising:

a transmit chain comprising a first portion and a second portion; and

a processor that initiates a power gain change of the first portion before an inter-symbol time, and wherein the processor initiates a power gain change of the second portion during the inter-symbol time, and wherein the power gain change of the first portion and the power gain change of the second portion both occur substantially within the inter-symbol time.

15. The apparatus of claim 14, wherein the inter-symbol time is a time between a data communication portion of a first OFDM symbol and a data communication portion of a second OFDM symbol.

16. The apparatus of claim 15, wherein the first portion is a part of a first integrated circuit, and wherein the second portion is a part of a second integrated circuit.

17. The apparatus of claim 16, wherein the second portion is a power amplifier.

18. The apparatus of claim 17, further comprising:

a serial bus interface circuit, wherein the processor initiates the power gain change of the first portion by writing a value into the serial bus interface circuit.

19. The apparatus of claim 14, wherein the first portion is a part of a first integrated circuit, wherein the second portion is a part of a second integrated circuit, and wherein the power gain change of the first portion is substantially completed before the power gain change of the second portion has begun.

20. A computer program product, comprising:

computer-readable medium comprising;

first code for initiating a first power gain change of a first part of a transmit chain, wherein the initiating of the first power gain change occurs before an inter-symbol time; and

second code for initiating a second power gain change of a second part of the transmit chain, wherein the initiating of the second power gain change occurs during the inter-symbol time, wherein the first power gain change and the second power gain change occur substantially during the inter-symbol time.

21. The computer program product of claim 20, wherein the computer-readable medium is a semiconductor memory of an integrated circuit, and wherein the integrated circuit includes a processor that executes the first code and the second code.

22. An apparatus comprising:

a first interface for communicating with a first portion of a transmit chain;

a second interface for communicating with a second portion of the transmit chain; and

means for initiating a power gain change of the first portion before an inter-symbol time and for initiating a power gain change of the second portion during the inter-symbol time such that the power gain change of the first portion and the power gain change of the second portion both occur substantially during the inter-symbol time.

23. The apparatus of claim 22, wherein the first interface is a serial bus interface, wherein the first portion includes a mixer, and wherein the second portion is a power amplifier.