Systems and Methods for Determining State of Battery Charge in a Host

• US 20090248331A1
• Filed: 03/31/2008
• Published: 10/01/2009
• Est. Priority Date: 03/31/2008
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Barsukov, Yevgen Pavlovich
• Granted Patent: US 7,808,244 B2
• Time in Patent Office: Days
• US Class Current: 702/63
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/3842 combining voltage and current measurements
• CPC Class Codes: G01R 31/389 Measuring internal impedance, internal conductance or related variables
• CPC Class Codes: Y10S 320/21 State of charge of battery

Abstract

A processor executes a program to calculate values of the internal resistance R of a battery and updates a database of parameters defining the dependence of internal resistance on the battery state of charge (SOC) and temperature. The database is utilized to obtain the information needed to make accurate remaining run-time calculations. The processor may also execute a program to effectuate entry of a database into memory representative of characteristics of the battery including values of measured open circuit voltages (OCV) of the battery and determinations of “starting SOC” values that correspond to the most recently measured values of OCV after the battery has stabilized. The processor may also execute programs to determine the present SOC of the battery, the present battery capacity, and the remaining run-time of the device powered by the battery.

Claims

1. A method comprising:

determining an internal resistance of a battery;

determining an initial current, I0, upon insertion of the battery;

determining a state of charge for the battery using the internal resistance of the battery and the initial current; and

reporting the state of charge.

2. The method of claim 1, further comprising:

determining an initial voltage, V0, upon insertion of the battery.

3. The method of claim 2, further comprising:

monitoring a steady state current to determine a charge/discharge rate, Q1; and

integrating the charge/discharge rate over a time t.

4. The method of claim 3, further comprising:

determining when a load current drops below a predetermined threshold current, I_th;

delaying for a time, t2, or until a rate of voltage change falls below a predetermined threshold rate; and

measuring a steady state voltage of the battery.

5. The method of claim 4, further comprising:

determining a state of charge, SOC1, associated with the measured steady state voltage of the battery;

determining a startup state of charge, SOC0, from SOC1, Q1, and a maximum battery charge, Qmax; and

determining an undistorted initial voltage OCV0 for the SOC0.

6. The method of claim 5, wherein determining the internal resistance of the battery comprises determining the internal resistance during insertion, R, from OCV0, V0 and I0.

7. The method of claim 6, further comprising:

saving R to non-volatile memory and associating R with the inserted battery.

8. The method of claim 6, further comprising:

determining a corrected initial voltage upon insertion V01 from R.

9. The method of claim 6, further comprising:

determining a corrected state of charge SOCc from R.

10. A system comprising:

a processor configured to;

determine an internal resistance of a battery;

determine an initial current upon insertion of the battery, I0;

determine a state of charge for the battery using the internal resistance of the battery and the initial current; and

report the state of charge.

11. The system of claim 10, further comprising memory for saving R and associating R with the inserted battery.

12. The system of claim 10, wherein the processor is further configured to determine an initial voltage, V0, of the battery upon insertion of the battery.

13. The system of claim 11, wherein the processor is further configured to:

monitor a steady state current to determine a charge/discharge rate, Q1; and

integrate the charge/discharge rate over a time t.

14. The system of claim 12, wherein the processor is further configured to:

determine when a load current drops below a predetermined threshold current, I_th;

delay for a time, t2, or until a rate of voltage change falls below a predetermined threshold rate; and

measure a steady state voltage of the battery.

15. The system of claim 13, wherein the processor is further configured to:

determine a state of charge, SOC1, associated with the measured steady state voltage of the battery;

determine a startup state of charge, SOC0, from SOC1, Q1, and a maximum battery charge, Qmax; and

determine an undistorted initial voltage OCV0 for the SOC0.

16. The system of claim 14, wherein the processor is further configured to determine the internal resistance during insertion, R, from OCV0, V0 and I0.

17. The system of claim 16, wherein the processor is further configured to determine a corrected initial voltage upon insertion V01 from R.

18. The system of claim 16, wherein the processor is further configured to determine a corrected state of charge SOCc from R.

19. A system comprising:

means for determining an internal resistance of a battery;

means for determining an initial current upon insertion of the battery, I0;

means for determining a state of charge for the battery using the internal resistance of the battery and the initial current; and

means for reporting the state of charge.

20. The system of claim 19, further comprising:

means for determining an initial voltage, V0, upon insertion of the battery;

means for monitoring a steady state current to determine a charge/discharge rate, Q1;

means for integrating the charge/discharge rate over a time t;

means for determining when a load current drops below a predetermined threshold current, I_th;

means for delaying for a time, t2, or until a rate of voltage change falls below a predetermined threshold rate;

means for measuring a steady state voltage of the battery;

means for determining a state of charge, SOC1, associated with the measured steady state voltage of the battery;

means for determining a startup state of charge, SOC0, from SOC1, Q1, and a maximum battery charge, Qmax;

means for determining an undistorted initial voltage OCV0 for the SOC0;

means for determining the internal resistance during insertion, R, from OCV0, V0 and I0; and

means for determining a corrected initial voltage V01 or a corrected state of charge SOCc upon insertion from R.